diff options
author | Varun Wadekar <vwadekar@nvidia.com> | 2012-06-22 18:28:04 +0530 |
---|---|---|
committer | Dan Willemsen <dwillemsen@nvidia.com> | 2013-09-14 12:09:48 -0700 |
commit | 6a1246c2a3263417662d8cfacff56ae6cd14c467 (patch) | |
tree | b165f99275da5e916b0ea97c2fd60950afd173ce /arch/arm/mach-tegra/latency_allowance.c | |
parent | 56b65356d0d53b85635748d2ea5f31831d1d6d04 (diff) |
ARM: tegra: la: fix compilations errors for T2
Change-Id: Ia61054f13fee9bcefaa290364297bbaeaa725110
Signed-off-by: Varun Wadekar <vwadekar@nvidia.com>
Rebase-Id: R55e6600e11ac7e10d2717f543497d5fa748774de
Diffstat (limited to 'arch/arm/mach-tegra/latency_allowance.c')
-rw-r--r-- | arch/arm/mach-tegra/latency_allowance.c | 2 |
1 files changed, 2 insertions, 0 deletions
diff --git a/arch/arm/mach-tegra/latency_allowance.c b/arch/arm/mach-tegra/latency_allowance.c index 1de99705df7f..0018c5e04122 100644 --- a/arch/arm/mach-tegra/latency_allowance.c +++ b/arch/arm/mach-tegra/latency_allowance.c @@ -374,6 +374,7 @@ static void set_vi_latency_thresholds(enum tegra_la_id id) set_thresholds(&vi_info[id - ID(VI_WSB)], id); } +#if !defined(CONFIG_ARCH_TEGRA_2x_SOC) /* Sets latency allowance based on clients memory bandwitdh requirement. * Bandwidth passed is in mega bytes per second. */ @@ -497,6 +498,7 @@ void tegra_disable_latency_scaling(enum tegra_la_id id) } spin_unlock(&safety_lock); } +#endif static int la_regs_show(struct seq_file *s, void *unused) { |