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authorAlex Frid <afrid@nvidia.com>2010-01-19 12:27:53 -0800
committerVenkata(Muni) Anda <muni@nvidia.com>2010-01-19 12:50:23 -0800
commit901100b1e5b1bf5a05a3d77fa04432141e6b049e (patch)
tree42cb126337c4e09779757063170060a10fba8ede /arch/arm/mach-tegra/pci.c
parent99558a6f6c01996f11e0c8d4c4dbdcb0880e513e (diff)
tegra RM: Enabled PCIe partition power gating.
Added support for PCIe power gating in Rm. Added call to NvRmPowerVoltageControl to enable the voltage. If there are not PCIe devices found, PCIe partition is power gated. Bug 627128 Change-Id: Ic9526261435a15d6bb27ed2cb6622098ef55be3a
Diffstat (limited to 'arch/arm/mach-tegra/pci.c')
-rw-r--r--arch/arm/mach-tegra/pci.c10
1 files changed, 10 insertions, 0 deletions
diff --git a/arch/arm/mach-tegra/pci.c b/arch/arm/mach-tegra/pci.c
index 2563e1200bde..c4ced311e223 100644
--- a/arch/arm/mach-tegra/pci.c
+++ b/arch/arm/mach-tegra/pci.c
@@ -222,6 +222,11 @@ static int __init pci_tegra_setup(int nr, struct pci_sys_data *data)
if (NvRmPowerRegister(s_hRmGlobal, 0, &pci_tegra_powerid) != NvSuccess)
goto fail;
+ if (NvRmPowerVoltageControl(s_hRmGlobal, NvRmPrivModuleID_Pcie,
+ pci_tegra_powerid, NvRmVoltsUnspecified, NvRmVoltsUnspecified,
+ NULL, 0, NULL) != NvSuccess)
+ goto fail;
+
if (NvRmPowerModuleClockControl(s_hRmGlobal, NvRmPrivModuleID_Pcie,
pci_tegra_powerid, NV_TRUE) != NvSuccess)
goto fail;
@@ -352,6 +357,11 @@ static int __init pci_tegra_setup(int nr, struct pci_sys_data *data)
if (!pci_tegra_check_rp(0) && !pci_tegra_check_rp(1)) {
pci_tegra_device_attached = false;
+ NvRmPowerVoltageControl(s_hRmGlobal, NvRmPrivModuleID_Pcie,
+ pci_tegra_powerid, NvRmVoltsOff, NvRmVoltsOff, NULL,
+ 0, NULL);
+ NvRmPowerModuleClockControl(s_hRmGlobal, NvRmPrivModuleID_Pcie,
+ pci_tegra_powerid, NV_FALSE);
pci_tegra_power(0);
return 0;
}