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authorMayuresh Kulkarni <mkulkarni@nvidia.com>2011-08-22 19:07:25 +0530
committerDan Willemsen <dwillemsen@nvidia.com>2011-11-30 21:48:31 -0800
commitaee9a2426e95f45826105ce02dbdfc8416b74c62 (patch)
tree8ecc451f5fcf09067407ac4a441d707abc7186a4 /arch/arm/mach-tegra/pinmux-t2-tables.c
parent9e25fb47abffb8590b52290d2ff2efed1655d97d (diff)
arm: tegra: pinmux: fix the Tegra2 pinmux table for RSVD values
The pin-func set by board-xxx-pinmux.c should be one of the 4 possible values of the pin-func in master pinmux table. Also the safe pin-func setting should follow the same rule. If this is not followed then, warnings will be seen whenever a driver tries to set a pin-func that is not in the master pinmux table. This is specically seen for the mux values RSVD_X. The hardware is always programmed with the bit value of setting (00, 01, 10, 11) which is the position (0, 1, 2, 3) in master pin-mux table. For bug 865503 Change-Id: I3933ca0002e099376798cc131690922fefa16868 Signed-off-by: Mayuresh Kulkarni <mkulkarni@nvidia.com> Reviewed-on: http://git-master/r/48197 Reviewed-by: Daniel Willemsen <dwillemsen@nvidia.com> Tested-by: Daniel Willemsen <dwillemsen@nvidia.com> Rebase-Id: R9177fb046ede6bd39b98904d25a18622b72d4ce6
Diffstat (limited to 'arch/arm/mach-tegra/pinmux-t2-tables.c')
-rw-r--r--arch/arm/mach-tegra/pinmux-t2-tables.c4
1 files changed, 2 insertions, 2 deletions
diff --git a/arch/arm/mach-tegra/pinmux-t2-tables.c b/arch/arm/mach-tegra/pinmux-t2-tables.c
index 0bb854aa8723..fa6f755626e4 100644
--- a/arch/arm/mach-tegra/pinmux-t2-tables.c
+++ b/arch/arm/mach-tegra/pinmux-t2-tables.c
@@ -116,7 +116,7 @@ const struct tegra_pingroup_desc tegra_soc_pingroups[TEGRA_MAX_PINGROUP] = {
PINGROUP(DAP2, AUDIO, DAP2, TWC, RSVD, GMI, DAP2, 0x14, 8, 0x88, 22, 0xA0, 12),
PINGROUP(DAP3, BB, DAP3, RSVD, RSVD, RSVD, DAP3, 0x14, 9, 0x88, 24, 0xA0, 14),
PINGROUP(DAP4, UART, DAP4, RSVD, GMI, RSVD, DAP4, 0x14, 10, 0x88, 26, 0xA0, 16),
- PINGROUP(DDC, LCD, I2C2, RSVD, RSVD, RSVD, RSVD4, 0x18, 31, 0x88, 0, 0xB0, 28),
+ PINGROUP(DDC, LCD, I2C2, RSVD, RSVD, RSVD, RSVD, 0x18, 31, 0x88, 0, 0xB0, 28),
PINGROUP(DTA, VI, RSVD, SDIO2, VI, RSVD, RSVD4, 0x14, 11, 0x84, 20, 0xA0, 18),
PINGROUP(DTB, VI, RSVD, RSVD, VI, SPI1, RSVD1, 0x14, 12, 0x84, 22, 0xA0, 20),
PINGROUP(DTC, VI, RSVD, RSVD, VI, RSVD, RSVD1, 0x14, 13, 0x84, 26, 0xA0, 22),
@@ -183,7 +183,7 @@ const struct tegra_pingroup_desc tegra_soc_pingroups[TEGRA_MAX_PINGROUP] = {
PINGROUP(LVS, LCD, DISPLAYA, DISPLAYB, XIO, RSVD, RSVD4, 0x1C, 26, 0x90, 24, 0xAC, 22),
PINGROUP(OWC, SYS, OWR, RSVD, RSVD, RSVD, OWR, 0x14, 31, 0x84, 8, 0xB0, 30),
PINGROUP(PMC, SYS, PWR_ON, PWR_INTR, RSVD, RSVD, PWR_ON, 0x14, 23, 0x98, 18, -1, -1),
- PINGROUP(PTA, NAND, I2C2, HDMI, GMI, RSVD, RSVD4, 0x14, 24, 0x98, 22, 0xA4, 4),
+ PINGROUP(PTA, NAND, I2C2, HDMI, GMI, RSVD, RSVD, 0x14, 24, 0x98, 22, 0xA4, 4),
PINGROUP(RM, UART, I2C, RSVD, RSVD, RSVD, RSVD4, 0x14, 25, 0x80, 14, 0xA4, 0),
PINGROUP(SDB, SD, UARTA, PWM, SDIO3, SPI2, PWM, 0x20, 15, 0x8C, 10, -1, -1),
PINGROUP(SDC, SD, PWM, TWC, SDIO3, SPI3, TWC, 0x18, 1, 0x8C, 12, 0xAC, 28),