diff options
| author | Mohit Kataria <mkataria@nvidia.com> | 2012-05-18 17:28:04 +0530 |
|---|---|---|
| committer | Varun Colbert <vcolbert@nvidia.com> | 2012-07-05 15:38:10 -0700 |
| commit | e764753820cb723501692204d8d36c5103903a2c (patch) | |
| tree | 0600fc0fe5941ce29756258d05461472a74bf95b /arch/arm/mach-tegra/pinmux-t3-tables.c | |
| parent | 25033fb96283a8ba9018db9ec13b64ace8022101 (diff) | |
ARM: Tegra: p1852: changed pinmux settings
Pinmux updated as per the latest pinmux sheet.
Bug 978870
Change-Id: I122439df3d043216f1c8c2c1a0a3c88e74d760ee
Signed-off-by: Mohit Kataria <mkataria@nvidia.com>
Reviewed-on: http://git-master/r/111573
(cherry picked from commit 4e65d7d21b5ac5b25e3563ce6a7eb50cf1d8128d)
Reviewed-on: http://git-master/r/103340
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Laxman Dewangan <ldewangan@nvidia.com>
Diffstat (limited to 'arch/arm/mach-tegra/pinmux-t3-tables.c')
| -rw-r--r-- | arch/arm/mach-tegra/pinmux-t3-tables.c | 12 |
1 files changed, 6 insertions, 6 deletions
diff --git a/arch/arm/mach-tegra/pinmux-t3-tables.c b/arch/arm/mach-tegra/pinmux-t3-tables.c index 90dbf757b909..09729a4cfbae 100644 --- a/arch/arm/mach-tegra/pinmux-t3-tables.c +++ b/arch/arm/mach-tegra/pinmux-t3-tables.c @@ -3,7 +3,7 @@ * * Common pinmux configurations for Tegra 3 SoCs * - * Copyright (C) 2010-2012 NVIDIA Corporation + * Copyright (c) 2010-2012, NVIDIA Corporation. All rights reserved. * * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License as published by @@ -320,7 +320,7 @@ const struct tegra_drive_pingroup_desc tegra_soc_drive_pingroups[TEGRA_MAX_DRIVE PINGROUP(GPIO_PBB5, PBB5, CAM, VGP5, DISPLAYA, DISPLAYB, POPSDMMC4, RSVD, INPUT, 0x32a0),\ PINGROUP(GPIO_PBB6, PBB6, CAM, VGP6, DISPLAYA, DISPLAYB, POPSDMMC4, RSVD, INPUT, 0x32a4),\ PINGROUP(GPIO_PBB7, PBB7, CAM, I2S4, RSVD1, RSVD2, POPSDMMC4, RSVD, INPUT, 0x32a8),\ - PINGROUP(GPIO_PCC2, PCC2, CAM, I2S4, RSVD1, RSVD2, RSVD3, RSVD, INPUT, 0x32ac),\ + PINGROUP(GPIO_PCC2, PCC2, CAM, I2S4, RSVD1, RSVD2, POPSDMMC4, RSVD, INPUT, 0x32ac),\ PINGROUP(JTAG_RTCK, PU7, SYS, RTCK, RSVD1, RSVD2, RSVD3, RTCK, INPUT, 0x32b0),\ PINGROUP(PWR_I2C_SCL, PZ6, SYS, I2CPWR, RSVD1, RSVD2, RSVD3, I2CPWR, INPUT, 0x32b4),\ PINGROUP(PWR_I2C_SDA, PZ7, SYS, I2CPWR, RSVD1, RSVD2, RSVD3, I2CPWR, INPUT, 0x32b8),\ @@ -377,11 +377,11 @@ const struct tegra_drive_pingroup_desc tegra_soc_drive_pingroups[TEGRA_MAX_DRIVE PINGROUP(SPI1_MISO, PX7, AUDIO, INVALID, SPI1, INVALID, RSVD3, RSVD, INPUT, 0x3384),\ PINGROUP(SPI2_CS1_N, PW2, AUDIO, INVALID, SPI2, INVALID, INVALID, RSVD, INPUT, 0x3388),\ PINGROUP(SPI2_CS2_N, PW3, AUDIO, INVALID, SPI2, INVALID, INVALID, RSVD, INPUT, 0x338c),\ - PINGROUP(SDMMC3_CLK, PA6, SDMMC3, UARTA, PWM2, SDMMC3, INVALID, SDMMC3, INPUT, 0x3390),\ + PINGROUP(SDMMC3_CLK, PA6, SDMMC3, UARTA, PWM2, SDMMC3, SPI3, SDMMC3, INPUT, 0x3390),\ PINGROUP(SDMMC3_CMD, PA7, SDMMC3, UARTA, PWM3, SDMMC3, INVALID, SDMMC3, INPUT, 0x3394),\ - PINGROUP(SDMMC3_DAT0, PB7, SDMMC3, RSVD0, RSVD1, SDMMC3, INVALID, SDMMC3, INPUT, 0x3398),\ - PINGROUP(SDMMC3_DAT1, PB6, SDMMC3, RSVD0, RSVD1, SDMMC3, INVALID, SDMMC3, INPUT, 0x339c),\ - PINGROUP(SDMMC3_DAT2, PB5, SDMMC3, RSVD0, PWM1, SDMMC3, INVALID, SDMMC3, INPUT, 0x33a0),\ + PINGROUP(SDMMC3_DAT0, PB7, SDMMC3, RSVD0, RSVD1, SDMMC3, SPI3, SDMMC3, INPUT, 0x3398),\ + PINGROUP(SDMMC3_DAT1, PB6, SDMMC3, RSVD0, RSVD1, SDMMC3, SPI3, SDMMC3, INPUT, 0x339c),\ + PINGROUP(SDMMC3_DAT2, PB5, SDMMC3, RSVD0, PWM1, SDMMC3, SPI3, SDMMC3, INPUT, 0x33a0),\ PINGROUP(SDMMC3_DAT3, PB4, SDMMC3, RSVD0, PWM0, SDMMC3, INVALID, SDMMC3, INPUT, 0x33a4),\ PINGROUP(SDMMC3_DAT4, PD1, SDMMC3, PWM1, INVALID, SDMMC3, INVALID, SDMMC3, INPUT, 0x33a8),\ PINGROUP(SDMMC3_DAT5, PD0, SDMMC3, PWM0, INVALID, SDMMC3, INVALID, SDMMC3, INPUT, 0x33ac),\ |