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authorHarry Hong <hhong@nvidia.com>2011-06-20 13:46:37 +0900
committerDan Willemsen <dwillemsen@nvidia.com>2011-11-30 21:47:14 -0800
commitf986637ebebb6eecd2b8cdd6f0afd6a87bf00492 (patch)
tree58598a1001222e37767e82de293969f0c35e8733 /arch/arm/mach-tegra/pinmux-t3-tables.c
parentabedbd10da75329ca78e07ac04458663b320bf78 (diff)
arm: tegra3: pinmux: Adding SFIO3 mode for VI_MCLK
SFIO3 on VI_MCLK pin is needed to output vi_sensor clk. bug 839517 Original-Change-Id: Ied7408a8711b0256b8fe98eea67c873a7b168bcb Reviewed-on: http://git-master/r/37426 Tested-by: Harry Hong <hhong@nvidia.com> Reviewed-by: Daniel Willemsen <dwillemsen@nvidia.com> Reviewed-by: Laxman Dewangan <ldewangan@nvidia.com> Reviewed-by: Matthew Longnecker <mlongnecker@nvidia.com> Rebase-Id: Ra0c9550efc2ff7af8075eaf7962be94f2d299c2b
Diffstat (limited to 'arch/arm/mach-tegra/pinmux-t3-tables.c')
-rw-r--r--arch/arm/mach-tegra/pinmux-t3-tables.c2
1 files changed, 1 insertions, 1 deletions
diff --git a/arch/arm/mach-tegra/pinmux-t3-tables.c b/arch/arm/mach-tegra/pinmux-t3-tables.c
index 7b8979cba6e0..9918aef53cc5 100644
--- a/arch/arm/mach-tegra/pinmux-t3-tables.c
+++ b/arch/arm/mach-tegra/pinmux-t3-tables.c
@@ -193,7 +193,7 @@ const struct tegra_pingroup_desc tegra_soc_pingroups[TEGRA_MAX_PINGROUP] = {
PINGROUP(VI_D10, VI, INVALID, RSVD1, VI, RSVD2, RSVD, INPUT, 0x314c),
PINGROUP(VI_D11, VI, INVALID, RSVD1, VI, RSVD2, RSVD, INPUT, 0x3150),
PINGROUP(VI_PCLK, VI, RSVD1, SDMMC2, VI, RSVD2, RSVD, INPUT, 0x3154),
- PINGROUP(VI_MCLK, VI, VI, INVALID, INVALID, INVALID, RSVD, INPUT, 0x3158),
+ PINGROUP(VI_MCLK, VI, INVALID, INVALID, INVALID, VI, RSVD, INPUT, 0x3158),
PINGROUP(VI_VSYNC, VI, INVALID, RSVD1, VI, RSVD2, RSVD, INPUT, 0x315c),
PINGROUP(VI_HSYNC, VI, INVALID, RSVD1, VI, RSVD2, RSVD, INPUT, 0x3160),
PINGROUP(UART2_RXD, UART, IRDA, SPDIF, UARTA, SPI4, RSVD, INPUT, 0x3164),