diff options
| author | Kenji Chen <kenjchen@nvidia.com> | 2011-03-09 10:44:16 +0800 |
|---|---|---|
| committer | Dan Willemsen <dwillemsen@nvidia.com> | 2012-03-22 13:55:45 -0700 |
| commit | b47017a497f74b2652bd0d4d7c1e9fadcd8f6767 (patch) | |
| tree | 8fdb256a67e39ca83d53375078c906f4a1852dc5 /arch/arm/mach-tegra/pinmux.c | |
| parent | 1dcb8ebc13d695e24715db06c9d7bec9fe56e77f (diff) | |
[ARM] tegra: pinmux: Correct driving strength programming offset
Offset of driving strength for DRVUP is 20 instead of 12.
Original-Change-Id: If886a8604ea43f57a8ae11d3deabb022fb8d3efd
Reviewed-on: http://git-master/r/22133
Reviewed-by: Varun Colbert <vcolbert@nvidia.com>
Tested-by: Varun Colbert <vcolbert@nvidia.com>
Rebase-Id: R6407f84d3c11052d863f612276ecd5ef9f41a06c
Diffstat (limited to 'arch/arm/mach-tegra/pinmux.c')
| -rw-r--r-- | arch/arm/mach-tegra/pinmux.c | 4 |
1 files changed, 2 insertions, 2 deletions
diff --git a/arch/arm/mach-tegra/pinmux.c b/arch/arm/mach-tegra/pinmux.c index ac35d2b76850..272d1384b0b2 100644 --- a/arch/arm/mach-tegra/pinmux.c +++ b/arch/arm/mach-tegra/pinmux.c @@ -503,8 +503,8 @@ static int tegra_drive_pinmux_set_pull_up(int pg, spin_lock_irqsave(&mux_lock, flags); reg = pg_readl(drive_pingroups[pg].reg_bank, drive_pingroups[pg].reg); - reg &= ~(0x1f << 12); - reg |= pull_up << 12; + reg &= ~(0x1f << 20); + reg |= pull_up << 20; pg_writel(reg, drive_pingroups[pg].reg_bank, drive_pingroups[pg].reg); spin_unlock_irqrestore(&mux_lock, flags); |