ARM: tegra: support multiple wake sources with same irq

Earlier implementation only allowed single wake source
for a particular irq in wake table. Changed implementation
to support multiple wake sources ==> single irq mapping.

bug 980993

Change-Id: Iacb00487531129ef19c53128824aba802e80350e
Signed-off-by: Bitan Biswas <bbiswas@nvidia.com>
Reviewed-on: http://git-master/r/103140
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Laxman Dewangan <ldewangan@nvidia.com>

1 files changed, 31 insertions, 31 deletions

diff --git a/arch/arm/mach-tegra/pm-irq.c b/arch/arm/mach-tegra/pm-irq.c
index 9b205f86f8b9..4a3f3c31830c 100644
--- a/arch/arm/mach-tegra/pm-irq.c
+++ b/arch/arm/mach-tegra/pm-irq.c
@@ -145,12 +145,15 @@ static inline void clear_pmc_sw_wake_status(void)
 
 int tegra_pm_irq_set_wake(int irq, int enable)
 {
-	int wake = tegra_irq_to_wake(irq);
+	struct wake_mask_types wake_msk;
+	int flow_type = -1;
+	int err;
 
-	if (wake == -EALREADY) {
+	err = tegra_irq_to_wake(irq, flow_type, &wake_msk);
+	if (err == -EALREADY) {
 		/* EALREADY means wakeup event already accounted for */
 		return 0;
-	} else if (wake == -ENOTSUPP) {
+	} else if (err == -ENOTSUPP) {
 		/* ENOTSUPP means LP0 not supported with this wake source */
 		WARN(enable && warn_prevent_lp0, "irq %d prevents lp0\n", irq);
 		if (enable)
@@ -158,46 +161,43 @@ int tegra_pm_irq_set_wake(int irq, int enable)
 		else if (!WARN_ON(tegra_prevent_lp0 == 0))
 			tegra_prevent_lp0--;
 		return 0;
-	} else if (wake < 0) {
+	} else if (err < 0) {
 		return -EINVAL;
 	}
 
-	if (enable) {
-		tegra_lp0_wake_enb |= 1ull << wake;
-		pr_info("Enabling wake%d\n", wake);
-	} else {
-		tegra_lp0_wake_enb &= ~(1ull << wake);
-		pr_info("Disabling wake%d\n", wake);
-	}
+	if (enable)
+		tegra_lp0_wake_enb |= (wake_msk.wake_mask_hi |
+			wake_msk.wake_mask_lo | wake_msk.wake_mask_any);
+	else
+		tegra_lp0_wake_enb &= ~(wake_msk.wake_mask_hi |
+			wake_msk.wake_mask_lo | wake_msk.wake_mask_any);
 
 	return 0;
 }
 
 int tegra_pm_irq_set_wake_type(int irq, int flow_type)
 {
-	int wake = tegra_irq_to_wake(irq);
+	struct wake_mask_types wake_msk;
+	int err;
+
+	err = tegra_irq_to_wake(irq, flow_type, &wake_msk);
 
-	if (wake < 0)
+	if (err < 0)
 		return 0;
 
-	switch (flow_type) {
-	case IRQF_TRIGGER_FALLING:
-	case IRQF_TRIGGER_LOW:
-		tegra_lp0_wake_level &= ~(1ull << wake);
-		tegra_lp0_wake_level_any &= ~(1ull << wake);
-		break;
-	case IRQF_TRIGGER_HIGH:
-	case IRQF_TRIGGER_RISING:
-		tegra_lp0_wake_level |= (1ull << wake);
-		tegra_lp0_wake_level_any &= ~(1ull << wake);
-		break;
-
-	case IRQF_TRIGGER_RISING | IRQF_TRIGGER_FALLING:
-		tegra_lp0_wake_level_any |= (1ull << wake);
-		break;
-	default:
-		return -EINVAL;
-	}
+	/* configure LOW/FALLING polarity wake sources for an irq */
+	tegra_lp0_wake_level &= ~wake_msk.wake_mask_lo;
+	tegra_lp0_wake_level_any &= ~wake_msk.wake_mask_lo;
+
+	/* configure HIGH/RISING polarity wake sources for an irq */
+	tegra_lp0_wake_level |= wake_msk.wake_mask_hi;
+	tegra_lp0_wake_level_any &= ~wake_msk.wake_mask_hi;
+
+	/*
+	 * configure RISING and FALLING i.e. ANY polarity wake
+	 * sources for an irq
+	 */
+	tegra_lp0_wake_level_any |= wake_msk.wake_mask_any;
 
 	return 0;
 }