diff options
| author | Bo Yan <byan@nvidia.com> | 2012-09-20 16:40:34 -0700 |
|---|---|---|
| committer | Rohan Somvanshi <rsomvanshi@nvidia.com> | 2012-10-10 22:53:30 -0700 |
| commit | 7e64b8f07565bba05d576adbeddf5cff4b6c3fad (patch) | |
| tree | e5566dc3099eff59acceeb606a7c43d3012db93c /arch/arm/mach-tegra/pm-t3.c | |
| parent | c51f22f057c80203fa80c8a98d7a3412946c31b6 (diff) | |
ARM: tegra11x: disable RAM repair
It's obvious that RAM repair is causing problems when switching
cluster. Disable it for now.
Reviewed-on: http://git-master/r/134214
(cherry picked from commit 4e72925ef08797e130618db7964e3f87346fa35c)
Change-Id: I07bf0a744d1d9bfa6758f8f10f104d03a68314c6
Signed-off-by: Bo Yan <byan@nvidia.com>
Signed-off-by: Deepak Nibade <dnibade@nvidia.com>
Reviewed-on: http://git-master/r/143139
Reviewed-by: Rohan Somvanshi <rsomvanshi@nvidia.com>
Tested-by: Rohan Somvanshi <rsomvanshi@nvidia.com>
Diffstat (limited to 'arch/arm/mach-tegra/pm-t3.c')
| -rw-r--r-- | arch/arm/mach-tegra/pm-t3.c | 13 |
1 files changed, 8 insertions, 5 deletions
diff --git a/arch/arm/mach-tegra/pm-t3.c b/arch/arm/mach-tegra/pm-t3.c index 7318b92a8688..961917f4b7e9 100644 --- a/arch/arm/mach-tegra/pm-t3.c +++ b/arch/arm/mach-tegra/pm-t3.c @@ -404,20 +404,23 @@ int tegra_cluster_control(unsigned int us, unsigned int flags) s64 t = ktime_to_us(ktime_sub(now, last_g2lp)); s64 t_off = tegra_cpu_power_off_time(); #if defined(CONFIG_ARCH_TEGRA_11x_SOC) - u32 reg; + /* u32 reg; */ #endif if (t_off > t) udelay((unsigned int)(t_off - t)); tegra_dvfs_rail_on(tegra_cpu_rail, now); #if defined(CONFIG_ARCH_TEGRA_11x_SOC) + /* + * comment out RAM repair as this seems impacting + * cluster switch + */ + /* enable RAM repair by flow controller */ + /* reg = readl(FLOW_CTRL_RAM_REPAIR); reg &= ~FLOW_CTRL_RAM_REPAIR_BYPASS_EN; writel(reg, FLOW_CTRL_RAM_REPAIR); - /* power up C rail */ - reg = readl(FLOW_CTRL_CPU_PWR_CSR); - reg |= FLOW_CTRL_CPU_PWR_CSR_RAIL_ENABLE; - writel(reg, FLOW_CTRL_CPU_PWR_CSR); + */ #endif } else { |