diff options
| author | Alex Frid <afrid@nvidia.com> | 2012-02-19 00:24:18 -0800 |
|---|---|---|
| committer | Simone Willett <swillett@nvidia.com> | 2012-03-01 13:22:32 -0800 |
| commit | 977d5a7cfa2f02673bbf3460ba06a444a627712a (patch) | |
| tree | bd9353cf4c0c022d8d4aba5f0b852d55d9413546 /arch/arm/mach-tegra/pm.c | |
| parent | d81e611a7be901e456624791b76bb78560d2204f (diff) | |
ARM: tegra: power: Fix Tegra2 power timer rate
Commit cb0428145196ed7a75861c78d28f46b6bc8d2320 implemented LP0
state entry with fast CPU and system bus clocks only for Tegra3,
but changed power timers rate calculation in the common Tegra2
and Tegra3 path. Fixing it now.
Signed-off-by: Alex Frid <afrid@nvidia.com>
(cherry picked from commit 9e66d6adf6ab1fe06eee63baf0f1f684715d1ae2)
Change-Id: Iac276f048fed4edbee318cadddb862e45ba851c6
Reviewed-on: http://git-master/r/86550
Tested-by: Aleksandr Frid <afrid@nvidia.com>
Reviewed-by: Yu-Huan Hsu <yhsu@nvidia.com>
Diffstat (limited to 'arch/arm/mach-tegra/pm.c')
| -rw-r--r-- | arch/arm/mach-tegra/pm.c | 2 |
1 files changed, 2 insertions, 0 deletions
diff --git a/arch/arm/mach-tegra/pm.c b/arch/arm/mach-tegra/pm.c index 52abf3badfbf..efa71fb9867a 100644 --- a/arch/arm/mach-tegra/pm.c +++ b/arch/arm/mach-tegra/pm.c @@ -719,7 +719,9 @@ static void tegra_pm_set(enum tegra_suspend_mode mode) switch (mode) { case TEGRA_SUSPEND_LP0: +#ifdef CONFIG_ARCH_TEGRA_3x_SOC rate = clk_get_rate_all_locked(tegra_pclk); +#endif if (pdata->combined_req) { reg |= TEGRA_POWER_PWRREQ_OE; reg &= ~TEGRA_POWER_CPU_PWRREQ_OE; |