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authorVarun Wadekar <vwadekar@nvidia.com>2012-03-30 09:43:40 +0530
committerSimone Willett <swillett@nvidia.com>2012-04-05 18:08:36 -0700
commitf31ca2d9e0580b58dc51fde31fc8ace190dd253b (patch)
treec66a1dd86c3254dd45e8673afbf17361547edfe1 /arch/arm/mach-tegra/pm.c
parente6d0e0ceec7cd1a7b8085eb31d2e70bc4d15684f (diff)
ARM: tegra: rethink the cpu suspend-resume code path
The current kernel methodology expects that tegra_cpu_suspend is actually the last function in the entire suspend sequence. In order to achieve this, the code needs to be remodelled a bit so that we actually execute native cpu_suspend at the end of the suspend sequence. This allows us to leverage all the cpu_suspend code developed by ARM in the upstream kernels. Bug 934368 Change-Id: I94172d7adaa54c10043c479a57b270925d85a16b Signed-off-by: Varun Wadekar <vwadekar@nvidia.com> Reviewed-on: http://git-master/r/84481 Reviewed-by: Simone Willett <swillett@nvidia.com> Tested-by: Simone Willett <swillett@nvidia.com>
Diffstat (limited to 'arch/arm/mach-tegra/pm.c')
-rw-r--r--arch/arm/mach-tegra/pm.c26
1 files changed, 4 insertions, 22 deletions
diff --git a/arch/arm/mach-tegra/pm.c b/arch/arm/mach-tegra/pm.c
index 07025b418298..e0a33c1da395 100644
--- a/arch/arm/mach-tegra/pm.c
+++ b/arch/arm/mach-tegra/pm.c
@@ -52,6 +52,7 @@
#include <asm/pgalloc.h>
#include <asm/pgtable.h>
#include <asm/tlbflush.h>
+#include <asm/suspend.h>
#include <mach/clk.h>
#include <mach/iomap.h>
@@ -261,18 +262,6 @@ static __init int create_suspend_pgtable(void)
return 0;
}
-/*
- * alloc_suspend_context
- *
- * Allocate a non-cacheable page to hold the CPU contexts.
- * The standard ARM CPU context save functions don't work if there's
- * an external L2 cache controller (like a PL310) in system.
- */
-static __init int alloc_suspend_context(void)
-{
- return 0;
-}
-
/* ensures that sufficient time is passed for a register write to
* serialize into the 32KHz domain */
static void pmc_32kwritel(u32 val, unsigned long offs)
@@ -505,9 +494,9 @@ static void tegra_sleep_core(enum tegra_suspend_mode mode,
}
#endif
#ifdef CONFIG_ARCH_TEGRA_2x_SOC
- tegra2_sleep_core(v2p);
+ cpu_suspend(v2p, tegra2_sleep_core_finish);
#else
- tegra3_sleep_core(v2p);
+ cpu_suspend(v2p, tegra3_sleep_core_finish);
#endif
}
@@ -518,7 +507,7 @@ static inline void tegra_sleep_cpu(unsigned long v2p)
(TEGRA_RESET_HANDLER_BASE +
tegra_cpu_reset_handler_offset));
#endif
- tegra_sleep_cpu_save(v2p);
+ cpu_suspend(v2p, tegra_sleep_cpu_finish);
}
unsigned int tegra_idle_lp2_last(unsigned int sleep_time, unsigned int flags)
@@ -1043,13 +1032,6 @@ void __init tegra_init_suspend(struct tegra_suspend_platform_data *plat)
goto fail;
}
- if (alloc_suspend_context() < 0) {
- pr_err("%s: CPU context alloc failed -- LP0/LP1/LP2 unavailable\n",
- __func__);
- plat->suspend_mode = TEGRA_SUSPEND_NONE;
- goto fail;
- }
-
if ((tegra_get_chipid() == TEGRA_CHIPID_TEGRA3) &&
(tegra_get_revision() == TEGRA_REVISION_A01) &&
(plat->suspend_mode == TEGRA_SUSPEND_LP0)) {