diff options
author | Dan Willemsen <dwillemsen@nvidia.com> | 2011-07-15 11:33:11 -0700 |
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committer | Dan Willemsen <dwillemsen@nvidia.com> | 2011-11-30 21:42:50 -0800 |
commit | 3a95f6ba8d555ccc8d5129bca6ccf126a964ec63 (patch) | |
tree | bf4299b7a2ff49ad66f16865eed166fe85ee588f /arch/arm/mach-tegra/pm.h | |
parent | 07fc300d8e1eb1016d5335d2dd2f75acda9b38e2 (diff) |
ARM: tegra: Fix flow control macros
HALT_CPU and CPU_CSR were backwards. Update with the formulas from
android-tegra-2.6.36, making it hopefully a bit clearer too.
With this fixed, Ventana LP2 works again.
Change-Id: Iebde05904755041ce36d493f8d02507b03dd818a
Reviewed-on: http://git-master/r/41257
Tested-by: Daniel Willemsen <dwillemsen@nvidia.com>
Reviewed-by: Scott Williams <scwilliams@nvidia.com>
Reviewed-by: Daniel Willemsen <dwillemsen@nvidia.com>
Rebase-Id: R4c6d9911e39bb9477ba43827ea73bdea729040d3
Diffstat (limited to 'arch/arm/mach-tegra/pm.h')
-rw-r--r-- | arch/arm/mach-tegra/pm.h | 4 |
1 files changed, 2 insertions, 2 deletions
diff --git a/arch/arm/mach-tegra/pm.h b/arch/arm/mach-tegra/pm.h index b079ab30b68f..7d7e2a87445f 100644 --- a/arch/arm/mach-tegra/pm.h +++ b/arch/arm/mach-tegra/pm.h @@ -56,9 +56,9 @@ unsigned long tegra_cpu_lp2_min_residency(void); #define TEGRA_POWER_CLUSTER_FORCE 0x8000 /* Force switch */ #define FLOW_CTRL_HALT_CPU(cpu) (IO_ADDRESS(TEGRA_FLOW_CTRL_BASE) + \ - ((cpu) == 0 ? 0x8 : (0x18 + 8 * ((cpu) - 1)))) + ((cpu) == 0 ? 0x0 : 0x14 + ((cpu) - 1) * 0x8)) #define FLOW_CTRL_CPU_CSR(cpu) (IO_ADDRESS(TEGRA_FLOW_CTRL_BASE) + \ - ((cpu) == 0 ? 0x0 : (0x4 + cpu * 0x10))) + ((cpu) == 0 ? 0x8 : 0x18 + ((cpu) - 1) * 0x8)) #define FLOW_CTRL_CLUSTER_CONTROL \ (IO_ADDRESS(TEGRA_FLOW_CTRL_BASE) + 0x2c) |