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authorWen Yi <wyi@nvidia.com>2012-06-20 21:42:13 -0700
committerSimone Willett <swillett@nvidia.com>2012-07-16 17:20:28 -0700
commit5e07056dc8b922b8b43a01b60a949c1dda75d9a9 (patch)
treebd8a99dc9e78be49ec0613779535f4dfdd2c466e /arch/arm/mach-tegra/pm.h
parent5a34d0584c5a45547c6733e177a0aa0c93dc1884 (diff)
arm: tegra: sd: enable sd dpd
This is a WAR solution that allows for the turning on SD DPD feature. The original issue is that enabling SD DPD immediately after device comes out of LP0 causes ULPI disconnect. The root cause of that is not known. The WAR is to delay the enabling of SD DPD for 100ms after device comes out of LP0. Bug 929628 Change-Id: I3c5e35ace422e5441535c2c0fe18545b53bbddc4 Signed-off-by: Wen Yi <wyi@nvidia.com> (cherry picked from commit bffb7b917d52a3523af80db21322ec7ba5fd33f9) Reviewed-on: http://git-master/r/113392 Reviewed-by: Simone Willett <swillett@nvidia.com> Tested-by: Simone Willett <swillett@nvidia.com>
Diffstat (limited to 'arch/arm/mach-tegra/pm.h')
-rw-r--r--arch/arm/mach-tegra/pm.h9
1 files changed, 1 insertions, 8 deletions
diff --git a/arch/arm/mach-tegra/pm.h b/arch/arm/mach-tegra/pm.h
index 421b21ac9342..65e816c7abc0 100644
--- a/arch/arm/mach-tegra/pm.h
+++ b/arch/arm/mach-tegra/pm.h
@@ -2,7 +2,7 @@
* arch/arm/mach-tegra/include/mach/pm.h
*
* Copyright (C) 2010 Google, Inc.
- * Copyright (C) 2010-2012 NVIDIA Corporation
+ * Copyright (c) 2010-2012, NVIDIA CORPORATION. All rights reserved.
*
* Author:
* Colin Cross <ccross@google.com>
@@ -67,13 +67,6 @@ struct tegra_suspend_platform_data {
unsigned int cpu_resume_boost; /* CPU frequency resume boost in kHz */
};
-/* Tegra io dpd entry - for each supported driver */
-struct tegra_io_dpd {
- const char *name; /* driver name */
- u8 io_dpd_reg_index; /* io dpd register index */
- u8 io_dpd_bit; /* bit position for driver in dpd register */
-};
-
unsigned long tegra_cpu_power_good_time(void);
unsigned long tegra_cpu_power_off_time(void);
unsigned long tegra_cpu_lp2_min_residency(void);