diff options
| author | Laxman Dewangan <ldewangan@nvidia.com> | 2011-07-12 16:16:14 +0530 |
|---|---|---|
| committer | Dan Willemsen <dwillemsen@nvidia.com> | 2011-11-30 21:47:43 -0800 |
| commit | a822cff7d11d896ac63f16aa797a180ba35f1c2c (patch) | |
| tree | 6f6e578359e7c9717059971edec3c3fed1232b20 /arch/arm/mach-tegra/pm.h | |
| parent | 89e04f1debe994d0161e9a519b53f74f9fd4d347 (diff) | |
arm: tegra: suspend: Add board specific suspend/resume calls
Adding board specific suspend and resume call apis through platform
data.
Added call of these function at appropriate stage of suspend/resume.
Added mechanism to select the uart debug channel base address through
variable so that board file can directly change this.
bug 820536
bug 832273
Original-Change-Id: Ia9ff3b8a8d2faa1071a8ff634960e6a6c8a43d40
Reviewed-on: http://git-master/r/34494
Reviewed-by: Varun Colbert <vcolbert@nvidia.com>
Tested-by: Varun Colbert <vcolbert@nvidia.com>
Rebase-Id: R6d7bfb3f8f9152779f5138cbcd1b7a9e9a9545df
Diffstat (limited to 'arch/arm/mach-tegra/pm.h')
| -rw-r--r-- | arch/arm/mach-tegra/pm.h | 16 |
1 files changed, 16 insertions, 0 deletions
diff --git a/arch/arm/mach-tegra/pm.h b/arch/arm/mach-tegra/pm.h index 778a67054672..5a620928c4bc 100644 --- a/arch/arm/mach-tegra/pm.h +++ b/arch/arm/mach-tegra/pm.h @@ -36,6 +36,16 @@ enum tegra_suspend_mode { TEGRA_MAX_SUSPEND_MODE, }; +enum suspend_stage { + TEGRA_SUSPEND_BEFORE_PERIPHERAL, + TEGRA_SUSPEND_BEFORE_CPU, +}; + +enum resume_stage { + TEGRA_RESUME_AFTER_PERIPHERAL, + TEGRA_RESUME_AFTER_CPU, +}; + struct tegra_suspend_platform_data { unsigned long cpu_timer; /* CPU power good time in us, LP2/LP1 */ unsigned long cpu_off_timer; /* CPU power off time us, LP2/LP1 */ @@ -45,6 +55,9 @@ struct tegra_suspend_platform_data { bool sysclkreq_high; /* System clock request is active-high */ enum tegra_suspend_mode suspend_mode; unsigned long cpu_lp2_min_residency; /* Min LP2 state residency in us */ + void (*board_suspend)(int lp_state, enum suspend_stage stg); + /* lp_state = 0 for LP0 state, 1 for LP1 state, 2 for LP2 state */ + void (*board_resume)(int lp_state, enum resume_stage stg); }; unsigned long tegra_cpu_power_good_time(void); @@ -197,4 +210,7 @@ extern bool tegra_all_cpus_booted __read_mostly; #define tegra_all_cpus_booted (true) #endif +/* The debug channel uart base physical address */ +extern unsigned long debug_uart_port_base; + #endif /* _MACH_TEGRA_PM_H_ */ |