diff options
author | Gary King <gking@nvidia.com> | 2010-05-26 21:40:35 -0700 |
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committer | Gary King <gking@nvidia.com> | 2010-05-26 21:49:08 -0700 |
commit | 8a4c20e35a435e8744618a19fd51d3d23ac5d16b (patch) | |
tree | 254ceae0e2f238db74df715b1831d9ac9a6c6b88 /arch/arm/mach-tegra/power.h | |
parent | 6e046b849857d08142c00a1febc6c34e778007cc (diff) |
[ARM/tegra] suspend: add suspend to LP2
implement basic support for system suspend operations using LP2 (CPU
power-gating)
platform-specific data (power good times, PMU capabilities, etc.) must be
specified when registering the suspend operations, and a helper function
for mapping from wakeup pad and PMU property data from the ODM kit to
the platform_data structure is provided.
AVP & RM suspend is performed in the prepare_late callback, ensuring that
these operations are executed after all drivers have suspended, to eliminate
ordering conflicts on RM dependencies
since all device interrupts (except timers) are disabled in the suspend
path, the wakeup interrupts need to be manually unmasked before entering
into a suspend state or the processor will never wake up; these forced-unmask
interrupts are re-masked immediately in the resume path to prevent the
kernel from live-locking prior to driver resume.
Change-Id: Ibe4d594d450b253744d803a0a15d66ae275029e8
Diffstat (limited to 'arch/arm/mach-tegra/power.h')
-rw-r--r-- | arch/arm/mach-tegra/power.h | 13 |
1 files changed, 13 insertions, 0 deletions
diff --git a/arch/arm/mach-tegra/power.h b/arch/arm/mach-tegra/power.h index 5763c4743e9a..ee0916863a06 100644 --- a/arch/arm/mach-tegra/power.h +++ b/arch/arm/mach-tegra/power.h @@ -33,12 +33,25 @@ #define TEGRA_POWER_EFFECT_LP0 0x40 /* enter LP0 when CPU pwr gated */ #define TEGRA_POWER_CPU_PWRREQ_POLARITY 0x80 /* CPU power request polarity */ #define TEGRA_POWER_CPU_PWRREQ_OE 0x100 /* CPU power request enable */ +#define TEGRA_POWER_PMC_SHIFT 8 +#define TEGRA_POWER_PMC_MASK 0x1ff #ifndef __ASSEMBLY__ void tegra_lp2_set_trigger(unsigned long cycles); void __cortex_a9_save(unsigned int mode); void tegra_lp2_startup(void); + +struct tegra_suspend_platform_data { + unsigned long cpu_timer; /* CPU power good time in us, LP2 */ + unsigned long core_timer; /* core power good time in ticks, LP0/LP1 */ + bool dram_suspend; /* platform supports DRAM self-refresh */ + bool core_off; /* platform supports core voltage off */ + bool corereq_high; /* Core power request active-high */ + bool sysclkreq_high; /* System clock request is active-high */ + bool separate_req; /* Core & CPU power request are separate */ +}; + #endif #endif |