diff options
| author | Chris Johnson <cwj@nvidia.com> | 2011-11-18 16:14:07 -0800 |
|---|---|---|
| committer | Varun Wadekar <vwadekar@nvidia.com> | 2011-12-08 17:59:13 +0530 |
| commit | 644d1fbf85ef31720cfefbe1f332767fe572e93a (patch) | |
| tree | e79dae0187c03fef575bee42306e63ced5d668d7 /arch/arm/mach-tegra/reset.c | |
| parent | d4808f8257f2868ac5dc29da2a266e975156c583 (diff) | |
arm: tegra: add Trusted Foundations hooks and driver
Add CONFIG_TRUSTED_FOUNDATIONS build option and calls to issue
SMCs to the TL secure monitor (used when needing to update state
not writable by non-secure code).
Make security/tf_driver an optional part of the build, which is
part of the TL framework to interact with secure services.
Bug 883391
Change-Id: I9c6c14ff457fb3a0c612d558fe731a17c2480750
Signed-off-by: Chris Johnson <cwj@nvidia.com>
Reviewed-on: http://git-master/r/65616
Reviewed-by: Varun Colbert <vcolbert@nvidia.com>
Tested-by: Varun Colbert <vcolbert@nvidia.com>
Diffstat (limited to 'arch/arm/mach-tegra/reset.c')
| -rw-r--r-- | arch/arm/mach-tegra/reset.c | 28 |
1 files changed, 14 insertions, 14 deletions
diff --git a/arch/arm/mach-tegra/reset.c b/arch/arm/mach-tegra/reset.c index 8c076515ec4b..c44a3de07873 100644 --- a/arch/arm/mach-tegra/reset.c +++ b/arch/arm/mach-tegra/reset.c @@ -26,33 +26,32 @@ #include "reset.h" #include "sleep.h" +#include "pm.h" static bool is_enabled; -void tegra_cpu_reset_handler_enable(void) +static void tegra_cpu_reset_handler_enable(void) { - void __tegra_cpu_reset_handler(void); - void __tegra_cpu_reset_handler_start(void); - void __tegra_cpu_reset_handler_end(void); + void __iomem *iram_base = IO_ADDRESS(TEGRA_IRAM_BASE); +#ifndef CONFIG_TRUSTED_FOUNDATIONS void __iomem *evp_cpu_reset = IO_ADDRESS(TEGRA_EXCEPTION_VECTORS_BASE + 0x100); - void __iomem *iram_base = IO_ADDRESS(TEGRA_IRAM_BASE); void __iomem *sb_ctrl = IO_ADDRESS(TEGRA_SB_BASE); - unsigned long cpu_reset_handler_size = - __tegra_cpu_reset_handler_end - __tegra_cpu_reset_handler_start; - unsigned long cpu_reset_handler_offset = - __tegra_cpu_reset_handler - __tegra_cpu_reset_handler_start; unsigned long reg; - +#endif BUG_ON(is_enabled); - BUG_ON(cpu_reset_handler_size > TEGRA_RESET_HANDLER_SIZE); + BUG_ON(tegra_cpu_reset_handler_size > TEGRA_RESET_HANDLER_SIZE); memcpy(iram_base, (void *)__tegra_cpu_reset_handler_start, - cpu_reset_handler_size); + tegra_cpu_reset_handler_size); +#ifdef CONFIG_TRUSTED_FOUNDATIONS + tegra_generic_smc(0xFFFFF200, + TEGRA_RESET_HANDLER_BASE + tegra_cpu_reset_handler_offset, 0); +#else /* NOTE: This must be the one and only write to the EVP CPU reset vector in the entire system. */ - writel(TEGRA_RESET_HANDLER_BASE + cpu_reset_handler_offset, + writel(TEGRA_RESET_HANDLER_BASE + tegra_cpu_reset_handler_offset, evp_cpu_reset); wmb(); reg = readl(evp_cpu_reset); @@ -62,8 +61,9 @@ void tegra_cpu_reset_handler_enable(void) reg = readl(sb_ctrl); reg |= 2; writel(reg, sb_ctrl); - is_enabled = true; wmb(); +#endif + is_enabled = true; } #ifdef CONFIG_PM_SLEEP |