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| author | Sang-Hun Lee <sanlee@nvidia.com> | 2012-04-16 10:53:22 -0700 |
|---|---|---|
| committer | Rohan Somvanshi <rsomvanshi@nvidia.com> | 2012-04-19 07:40:00 -0700 |
| commit | 4fa4ef0ac97433028ad84f9df1266790c44651e7 (patch) | |
| tree | c87ecb54fd49c97d7bd9e61e4a01d879afa530ab /arch/arm/mach-tegra/sleep-t2.S | |
| parent | 73005f0d83526d615387a8f19669013feace1443 (diff) | |
Revert "ARM: tegra: remove usage of USE_TEGRA_CPU_SUSPEND"
This reverts commit e6d0e0ceec7cd1a7b8085eb31d2e70bc4d15684f.
Bug 967887
Change-Id: I60927a93ebdf6ba4da14311f8ffcc1edf4f56391
Signed-off-by: Sang-Hun Lee <sanlee@nvidia.com>
Reviewed-on: http://git-master/r/96788
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Varun Wadekar <vwadekar@nvidia.com>
Diffstat (limited to 'arch/arm/mach-tegra/sleep-t2.S')
| -rw-r--r-- | arch/arm/mach-tegra/sleep-t2.S | 10 |
1 files changed, 10 insertions, 0 deletions
diff --git a/arch/arm/mach-tegra/sleep-t2.S b/arch/arm/mach-tegra/sleep-t2.S index 6289541da8e9..f70360628f34 100644 --- a/arch/arm/mach-tegra/sleep-t2.S +++ b/arch/arm/mach-tegra/sleep-t2.S @@ -229,8 +229,18 @@ ENTRY(tegra2_sleep_wfi) bl tegra_pen_unlock +#if USE_TEGRA_CPU_SUSPEND + /* Enable the data cache and SMP coherency */ + mrc p15, 0, r10, c1, c0, 0 + orr r10, r10, #CR_C + dsb + mcr p15, 0, r10, c1, c0, 0 + isb mcr p15, 0, r11, c1, c0, 1 @ reenable coherency +#else + mcr p15, 0, r11, c1, c0, 1 @ reenable coherency +#endif /* Invalidate the TLBs & BTAC */ mov r1, #0 mcr p15, 0, r1, c8, c3, 0 @ invalidate shared TLBs |