diff options
| author | Scott Williams <scwilliams@nvidia.com> | 2011-08-03 19:07:51 -0700 |
|---|---|---|
| committer | Dan Willemsen <dwillemsen@nvidia.com> | 2011-11-30 21:47:01 -0800 |
| commit | eebc91326681f02111bd463ef40d8f9286ee24bf (patch) | |
| tree | fa7b043f636cd50ea3e334b42d237319fa44e7ee /arch/arm/mach-tegra/sleep-t2.S | |
| parent | e6cb97db16e4eed8b56be29b0a7035866aa90d98 (diff) | |
ARM: tegra: power: Consolidate CPU context save and SMP exit
Every call to tegra_cpu_save is always followed by a call to
tegra_cpu_exit_coherency. Simplify the callers of tegra_cpu_save
by folding the CPU context save functionality of cpu_suspend and
the coherency exit functionality into a single function called
tegra_cpu_suspend.
Change-Id: Ia71a663b2971685712d5b8a2b7e8b44fe1526f40
Signed-off-by: Scott Williams <scwilliams@nvidia.com>
Rebase-Id: R36c0c5f44608d0c099d928e19e36af2e7ba061d8
Diffstat (limited to 'arch/arm/mach-tegra/sleep-t2.S')
| -rw-r--r-- | arch/arm/mach-tegra/sleep-t2.S | 2 |
1 files changed, 0 insertions, 2 deletions
diff --git a/arch/arm/mach-tegra/sleep-t2.S b/arch/arm/mach-tegra/sleep-t2.S index 6b6de9b8d91e..a0547084dd27 100644 --- a/arch/arm/mach-tegra/sleep-t2.S +++ b/arch/arm/mach-tegra/sleep-t2.S @@ -172,7 +172,6 @@ ENDPROC(tegra2_cpu_is_resettable_soon) ENTRY(tegra2_sleep_core) mov r3, lr @ set resume address to lr bl tegra_cpu_save - bl tegra_cpu_exit_coherency mov32 r1, tegra2_tear_down_core mov32 r2, tegra2_iram_start sub r1, r1, r2 @@ -188,7 +187,6 @@ ENTRY(tegra2_sleep_wfi) mov r3, lr @ set resume address to lr mrc p15, 0, r2, c1, c0, 1 @ save actlr before exiting coherency bl tegra_cpu_save - bl tegra_cpu_exit_coherency mov r11, r2 mov32 r3, TEGRA_PMC_VIRT |