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authorVarun Wadekar <vwadekar@nvidia.com>2012-03-30 09:43:40 +0530
committerSimone Willett <swillett@nvidia.com>2012-04-05 18:08:36 -0700
commitf31ca2d9e0580b58dc51fde31fc8ace190dd253b (patch)
treec66a1dd86c3254dd45e8673afbf17361547edfe1 /arch/arm/mach-tegra/sleep-t2.S
parente6d0e0ceec7cd1a7b8085eb31d2e70bc4d15684f (diff)
ARM: tegra: rethink the cpu suspend-resume code path
The current kernel methodology expects that tegra_cpu_suspend is actually the last function in the entire suspend sequence. In order to achieve this, the code needs to be remodelled a bit so that we actually execute native cpu_suspend at the end of the suspend sequence. This allows us to leverage all the cpu_suspend code developed by ARM in the upstream kernels. Bug 934368 Change-Id: I94172d7adaa54c10043c479a57b270925d85a16b Signed-off-by: Varun Wadekar <vwadekar@nvidia.com> Reviewed-on: http://git-master/r/84481 Reviewed-by: Simone Willett <swillett@nvidia.com> Tested-by: Simone Willett <swillett@nvidia.com>
Diffstat (limited to 'arch/arm/mach-tegra/sleep-t2.S')
-rw-r--r--arch/arm/mach-tegra/sleep-t2.S25
1 files changed, 14 insertions, 11 deletions
diff --git a/arch/arm/mach-tegra/sleep-t2.S b/arch/arm/mach-tegra/sleep-t2.S
index 6289541da8e9..fc7b3db22318 100644
--- a/arch/arm/mach-tegra/sleep-t2.S
+++ b/arch/arm/mach-tegra/sleep-t2.S
@@ -179,25 +179,29 @@ ENDPROC(tegra2_cpu_is_resettable_soon)
* enters suspend in LP0 or LP1 by turning off the mmu and jumping to
* tegra2_tear_down_core in IRAM
*/
-ENTRY(tegra2_sleep_core)
- mov r12, pc @ return here is via r12
- b tegra_cpu_save
+ENTRY(tegra2_sleep_core_finish)
+ bl tegra_cpu_exit_coherency
mov32 r1, tegra2_tear_down_core
mov32 r2, tegra2_iram_start
sub r1, r1, r2
mov32 r2, TEGRA_IRAM_CODE_AREA
add r1, r1, r2
b tegra_turn_off_mmu
-ENDPROC(tegra2_sleep_core)
+ENDPROC(tegra2_sleep_core_finish)
/*
* tegra2_sleep_wfi(unsigned long v2p)
*/
ENTRY(tegra2_sleep_wfi)
- mrc p15, 0, r2, c1, c0, 1 @ save actlr before exiting coherency
- mov r12, pc @ return here is via r12
- b tegra_cpu_save
- mov r11, r2
+ stmfd sp!, {r4 - r9, lr}
+ mov r9, sp @ save sp for aborted suspend
+ adr r1, BSYM(tegra_sleep_cpu_save_finish)
+ bl cpu_suspend
+ ldmfd sp!, {r4 - r9, pc}
+
+tegra_sleep_cpu_save_finish:
+ mrc p15, 0, r11, c1, c0, 1 @ save actlr before exiting coherency
+ bl tegra_cpu_exit_coherency
mov32 r0, TEGRA_PMC_VIRT + PMC_SCRATCH41
mov r3, #CPU_RESETTABLE
@@ -219,7 +223,7 @@ ENTRY(tegra2_sleep_wfi)
* r11 contains the original actlr
*/
- mov sp, r7 @ restore SP for aborted suspend
+ mov sp, r9 @ restore SP for aborted suspend
bl tegra_pen_lock
mov32 r3, TEGRA_PMC_VIRT
@@ -262,8 +266,7 @@ ENTRY(tegra2_sleep_wfi)
no_l2_sync:
#endif
- pop_ctx_regs r0, r1 @ restore context registers
- mov pc, lr
+ ldmfd sp!, {r4 - r9, pc}
ENDPROC(tegra2_sleep_wfi)
/*