diff options
| author | Scott Williams <scwilliams@nvidia.com> | 2011-07-21 13:20:02 -0700 |
|---|---|---|
| committer | Dan Willemsen <dwillemsen@nvidia.com> | 2011-11-30 21:46:49 -0800 |
| commit | 8e34fb96d17f73e807f41c3160aa3c1770ea6a1d (patch) | |
| tree | 3814ba505455f85972d02165a67bc11019e4dd66 /arch/arm/mach-tegra/sleep-t2.S | |
| parent | 9b000ba752e0cc7199dab9f9cb2ee083a4dead93 (diff) | |
ARM: tegra: sleep: Remove hard-coded register offset
Change-Id: I0fb4dc6ff2158d2d9661e3a231e02fc3ae0cc86e
Signed-off-by: Scott Williams <scwilliams@nvidia.com>
DW: Split into logical changes
Signed-off-by: Dan Willemsen <dwillemsen@nvidia.com>
Rebase-Id: Ra4a5d9780d6329b2d029e3391c5d5145940c29c7
Diffstat (limited to 'arch/arm/mach-tegra/sleep-t2.S')
| -rw-r--r-- | arch/arm/mach-tegra/sleep-t2.S | 4 |
1 files changed, 3 insertions, 1 deletions
diff --git a/arch/arm/mach-tegra/sleep-t2.S b/arch/arm/mach-tegra/sleep-t2.S index 0f9ac080683f..e683680384d6 100644 --- a/arch/arm/mach-tegra/sleep-t2.S +++ b/arch/arm/mach-tegra/sleep-t2.S @@ -65,6 +65,8 @@ #define CLK_RESET_PLLX_BASE 0xe0 #define CLK_RESET_PLLX_MISC 0xe4 +#define CLK_RESET_RST_CPU_CMPLX_SET 0x340 + #define TEGRA_PMC_VIRT (TEGRA_PMC_BASE - IO_APB_PHYS + IO_APB_VIRT) #define TEGRA_ARM_PERIF_VIRT (TEGRA_ARM_PERIF_BASE - IO_CPU_PHYS + IO_CPU_VIRT) #define TEGRA_CLK_RESET_VIRT (TEGRA_CLK_RESET_BASE - IO_PPSB_PHYS + IO_PPSB_VIRT) @@ -128,7 +130,7 @@ ENTRY(tegra2_cpu_reset) movw r1, 0x1011 mov r1, r1, lsl r0 mov32 r3, TEGRA_CLK_RESET_VIRT - str r1, [r3, #0x340] @ put slave CPU in reset + str r1, [r3, #CLK_RESET_RST_CPU_CMPLX_SET] @ put slave CPU in reset isb dsb cpu_id r3 |