summaryrefslogtreecommitdiff
path: root/arch/arm/mach-tegra/sleep-t3.S
diff options
context:
space:
mode:
authorvenu byravarasu <vbyravarasu@nvidia.com>2011-09-27 12:26:46 +0530
committerDan Willemsen <dwillemsen@nvidia.com>2011-11-30 21:49:03 -0800
commit3ca3ca13076cf8a565d8709853b5704ecf531dd9 (patch)
treeb8079355a9d2d738983554dd5ecb5869d59d57e0 /arch/arm/mach-tegra/sleep-t3.S
parentc3d570d28dcb711689f61247339c073f330dce80 (diff)
arm: tegra: correcting wfi sequence
As per hardware documentation, dsb should precede wfi. Hence fixing it. Change-Id: I1c98581dfe3891d425ab36c1a2bb313e19ad046d Reviewed-on: http://git-master/r/54626 Tested-by: Venu Byravarasu <vbyravarasu@nvidia.com> Reviewed-by: Scott Williams <scwilliams@nvidia.com> Rebase-Id: R3d7e46306d7d97c2cdfa0ec7ce658a1658724a76
Diffstat (limited to 'arch/arm/mach-tegra/sleep-t3.S')
-rw-r--r--arch/arm/mach-tegra/sleep-t3.S4
1 files changed, 2 insertions, 2 deletions
diff --git a/arch/arm/mach-tegra/sleep-t3.S b/arch/arm/mach-tegra/sleep-t3.S
index fa6e920c94cb..785239f32dde 100644
--- a/arch/arm/mach-tegra/sleep-t3.S
+++ b/arch/arm/mach-tegra/sleep-t3.S
@@ -583,8 +583,8 @@ tegra3_enter_sleep:
ldr r0, [r6, r2] /* memory barrier */
halted:
- dsb
isb
+ dsb
wfi /* CPU should be power gated here */
/* !!!FIXME!!! Implement halt failure handler */
@@ -594,7 +594,7 @@ halted:
* tegra3_sdram_self_refresh
*
* called with MMU off and caches disabled
- * puts sdram in self refresh
+ /* puts sdram in self refresh
* must execute from IRAM
* r4 = TEGRA_PMC_BASE
* r5 = TEGRA_CLK_RESET_BASE