diff options
| author | Varun Wadekar <vwadekar@nvidia.com> | 2012-03-30 09:43:40 +0530 |
|---|---|---|
| committer | Simone Willett <swillett@nvidia.com> | 2012-04-05 18:08:36 -0700 |
| commit | f31ca2d9e0580b58dc51fde31fc8ace190dd253b (patch) | |
| tree | c66a1dd86c3254dd45e8673afbf17361547edfe1 /arch/arm/mach-tegra/sleep-t3.S | |
| parent | e6d0e0ceec7cd1a7b8085eb31d2e70bc4d15684f (diff) | |
ARM: tegra: rethink the cpu suspend-resume code path
The current kernel methodology expects that tegra_cpu_suspend
is actually the last function in the entire suspend sequence.
In order to achieve this, the code needs to be remodelled a
bit so that we actually execute native cpu_suspend at the end
of the suspend sequence. This allows us to leverage all the
cpu_suspend code developed by ARM in the upstream kernels.
Bug 934368
Change-Id: I94172d7adaa54c10043c479a57b270925d85a16b
Signed-off-by: Varun Wadekar <vwadekar@nvidia.com>
Reviewed-on: http://git-master/r/84481
Reviewed-by: Simone Willett <swillett@nvidia.com>
Tested-by: Simone Willett <swillett@nvidia.com>
Diffstat (limited to 'arch/arm/mach-tegra/sleep-t3.S')
| -rw-r--r-- | arch/arm/mach-tegra/sleep-t3.S | 22 |
1 files changed, 11 insertions, 11 deletions
diff --git a/arch/arm/mach-tegra/sleep-t3.S b/arch/arm/mach-tegra/sleep-t3.S index 4417da33de38..6d58585a4903 100644 --- a/arch/arm/mach-tegra/sleep-t3.S +++ b/arch/arm/mach-tegra/sleep-t3.S @@ -201,14 +201,13 @@ ENDPROC(tegra3_cpu_reset) #ifdef CONFIG_PM_SLEEP /* - * tegra3_sleep_core(unsigned long v2p) + * tegra3_sleep_core_finish(unsigned long int) * * enters suspend in LP0 or LP1 by turning off the mmu and jumping to * tegra3_tear_down_core in IRAM */ -ENTRY(tegra3_sleep_core) - mov r12, pc @ return here is via r12 - b tegra_cpu_save +ENTRY(tegra3_sleep_core_finish) + bl tegra_cpu_exit_coherency /* preload all the address literals that are needed for the * CPU power-gating process, to avoid loads from SDRAM (which are @@ -227,22 +226,23 @@ ENTRY(tegra3_sleep_core) mov32 r2, TEGRA_IRAM_CODE_AREA add r1, r1, r2 b tegra_turn_off_mmu -ENDPROC(tegra3_sleep_core) +ENDPROC(tegra3_sleep_core_finish) /* - * tegra3_sleep_cpu_secondary(unsigned long v2p) + * tegra3_sleep_cpu_secondary_finish(unsigned long v2p) * * Enters LP2 on secondary CPU by exiting coherency and powergating the CPU. */ -ENTRY(tegra3_sleep_cpu_secondary) - mov r12, pc @ return here is via r12 - b tegra_cpu_save +ENTRY(tegra3_sleep_cpu_secondary_finish) + mov r6, lr + bl tegra_cpu_exit_coherency /* Powergate this CPU. */ mov r0, #0 @ power mode flags (!hotplug) bl tegra3_cpu_reset - b . @ should never get here -ENDPROC(tegra3_sleep_cpu_secondary) + mov r0, #1 @ never return here + mov pc, r6 +ENDPROC(tegra3_sleep_cpu_secondary_finish) /* * tegra3_tear_down_cpu |