arm: tegra: turn off pll-a/p in LP1

- current code does not turn off pll-a/p in LP1
irrespective of voice call status
- add a new flag to indicate voice call on-going
- use PMC_SCRATCH37 to hold this flag
- if it is set, do not turn-off pll-a/p during LP1
- save-restore PMC_SCRATCH37 if it was used to hold the
voice call on-going flag
- fix few misc formatting issues in tegra3_cpu_clk32k

Bug 924817

Signed-off-by: Mayuresh Kulkarni <mkulkarni@nvidia.com>
Reviewed-on: http://git-master/r/85768
(cherry picked from commit 7853981c987ae329620bb54d869016cb74a6c054)

Change-Id: Id5348d2eb44a4bacaf00f6d17edceedaef819e29
Reviewed-on: http://git-master/r/94395
Tested-by: Mayuresh Kulkarni <mkulkarni@nvidia.com>
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Bharat Nihalani <bnihalani@nvidia.com>

Conflicts:

	arch/arm/mach-tegra/pm.c

Signed-off-by: Varun Wadekar <vwadekar@nvidia.com>

1 files changed, 7 insertions, 8 deletions

diff --git a/arch/arm/mach-tegra/sleep-t3.S b/arch/arm/mach-tegra/sleep-t3.S
index d7cbcb349bcc..ed697bf3af96 100644
--- a/arch/arm/mach-tegra/sleep-t3.S
+++ b/arch/arm/mach-tegra/sleep-t3.S
@@ -528,7 +528,7 @@ tegra3_cpu_clk32k:
 
 	/* enable PLLM via PMC in LP0 */
 	ldr	r0, [r4, #PMC_PLLP_WB0_OVERRIDE]
-	orr	r0, r0, #((1<<12) | (1 << 11))
+	orr	r0, r0, #((1 << 12) | (1 << 11))
 	str	r0, [r4, #PMC_PLLP_WB0_OVERRIDE]
 	mov	pc, lr
 
@@ -552,29 +552,28 @@ lp1_clocks_prepare:
 	add	r1, r1, #2
 	wait_until r1, r7, r9
 
-#if 1
 	/* switch to CLKS */
 	mov	r0, #0	/* burst policy = 32KHz */
 	str	r0, [r5, #CLK_RESET_SCLK_BURST]
-#endif
 
 	/* disable PLLM via PMC in LP1 */
 	ldr	r0, [r4, #PMC_PLLP_WB0_OVERRIDE]
-	bic	r0, r0, #(1<<12)
+	bic	r0, r0, #(1 << 12)
 	str	r0, [r4, #PMC_PLLP_WB0_OVERRIDE]
 	b	powerdown_pll_pcx
 
 powerdown_pll_pcx:
-	/* disable PLLP, PLLA, PLLC, and PLLX in LP0 and LP1 states */
-	ldr	r0, [r4, #PMC_CTRL]
-	tst	r0, #PMC_CTRL_SIDE_EFFECT_LP0
-	beq	powerdown_pll_cx
+	ldr	r11, [r4, #PMC_SCRATCH37]	@ load the LP1 flags
+	tst	r11, #TEGRA_POWER_LP1_AUDIO	@ check if voice call is going on
+	bne	powerdown_pll_cx		@ if yes, do not turn off pll-p/pll-a
+
 	ldr	r0, [r5, #CLK_RESET_PLLP_BASE]
 	bic	r0, r0, #(1<<30)
 	str	r0, [r5, #CLK_RESET_PLLP_BASE]
 	ldr	r0, [r5, #CLK_RESET_PLLA_BASE]
 	bic	r0, r0, #(1<<30)
 	str	r0, [r5, #CLK_RESET_PLLA_BASE]
+
 powerdown_pll_cx:
 	ldr	r0, [r5, #CLK_RESET_PLLC_BASE]
 	bic	r0, r0, #(1<<30)