diff options
| author | Karthik Ramakrishnan <karthikr@nvidia.com> | 2012-10-12 20:27:09 -0700 |
|---|---|---|
| committer | Simone Willett <swillett@nvidia.com> | 2012-11-09 12:45:46 -0800 |
| commit | 8761cc06ff07d37263d458aad126f6b9fb63209f (patch) | |
| tree | 21d17f78ea73d2de71f327572d5d55877e2b57e4 /arch/arm/mach-tegra/sleep-t3.S | |
| parent | db10249e8ffb9e617eb014097e39a1b92b1cbb4d (diff) | |
ARM: tegra: Set scratch1_eco register for memory dpd
Setting the proper PMC register settings for memory in
suspend mode. This will be reset back on resume from lp0
in the bct.
Bug 1156167
Change-Id: I53fe808bbfa22a4c28fb24868f6787fe97a927bf
Signed-off-by: Karthik Ramakrishnan <karthikr@nvidia.com>
(cherry picked from commit 22752293180a7e03418ebaa2e1e4c94d103b0330)
Reviewed-on: http://git-master/r/160029
Reviewed-by: Simone Willett <swillett@nvidia.com>
Tested-by: Simone Willett <swillett@nvidia.com>
Diffstat (limited to 'arch/arm/mach-tegra/sleep-t3.S')
| -rw-r--r-- | arch/arm/mach-tegra/sleep-t3.S | 7 |
1 files changed, 7 insertions, 0 deletions
diff --git a/arch/arm/mach-tegra/sleep-t3.S b/arch/arm/mach-tegra/sleep-t3.S index c675e91da20d..c7aaeea1d76e 100644 --- a/arch/arm/mach-tegra/sleep-t3.S +++ b/arch/arm/mach-tegra/sleep-t3.S @@ -70,6 +70,7 @@ #define PMC_IO_DPD_REQ 0x1b8 #define PMC_IO_DPD_STATUS 0x1bc +#define PMC_SCRATCH1_ECO 0x264 #define CLK_RESET_CCLK_BURST 0x20 #define CLK_RESET_CCLK_DIVIDER 0x24 @@ -890,6 +891,12 @@ emcself: emc_timing_update r1, r0 + /* SCRATCH1_ECO register*/ + ldr r1, [r4, #PMC_SCRATCH1_ECO] + bic r1, r1, #0x3F + orr r1, r1, #0x3F + str r1, [r4, #PMC_SCRATCH1_ECO] + ldr r1, [r4, #PMC_CTRL] tst r1, #PMC_CTRL_SIDE_EFFECT_LP0 bne pmc_io_dpd_skip |