diff options
| author | Alex Frid <afrid@nvidia.com> | 2013-06-17 15:03:40 -0700 |
|---|---|---|
| committer | Dan Willemsen <dwillemsen@nvidia.com> | 2013-09-14 13:39:25 -0700 |
| commit | 615b6763ba97642477659f4f596a8b880ce5c9e0 (patch) | |
| tree | 35342f763464db5da136d08b3bdebf9d6def699a /arch/arm/mach-tegra/sleep-t30.S | |
| parent | 7761a7234b7774277964df6b88eeb94f55458bef (diff) | |
ARM: tegra14: power: Save clock configuration on LP1BB entry
Change-Id: If8ca43f947005187ebe03b49ccc22387db21885d
Signed-off-by: Alex Frid <afrid@nvidia.com>
Reviewed-on: http://git-master/r/239434
(cherry picked from commit 3871cdd921a315c5c69395d9350dc975c1526c8c)
Reviewed-on: http://git-master/r/258309
Reviewed-by: Simone Willett <swillett@nvidia.com>
Tested-by: Simone Willett <swillett@nvidia.com>
Diffstat (limited to 'arch/arm/mach-tegra/sleep-t30.S')
| -rw-r--r-- | arch/arm/mach-tegra/sleep-t30.S | 8 |
1 files changed, 7 insertions, 1 deletions
diff --git a/arch/arm/mach-tegra/sleep-t30.S b/arch/arm/mach-tegra/sleep-t30.S index 99ddde428d15..67a1f9ea09a5 100644 --- a/arch/arm/mach-tegra/sleep-t30.S +++ b/arch/arm/mach-tegra/sleep-t30.S @@ -834,6 +834,7 @@ lp1bb_entry: str r0, lp_enter_state bl tegra148_set_lp_state bl tegra148_set_mem_req_interrupt + bl tegra3_save_config bl tegra3_cpu_clk32k b tegra3_enter_sleep @@ -927,11 +928,13 @@ tegra3_lp0_tear_down_core: bleq tegra148_set_mem_req_interrupt bl tegra148_set_lp_state #endif + bl tegra3_save_config bl tegra3_sdram_self_refresh bl tegra3_cpu_clk32k b tegra3_enter_sleep tegra3_stop_mc_clk: + bl tegra3_save_config bl tegra3_sdram_self_refresh mov r1, #(1 << 25) str r1, [r5, #CLK_RESET_CLK_ENB_H_CLR] @@ -1186,7 +1189,7 @@ halted: * r7 = TEGRA_TMRUS_BASE */ -tegra3_sdram_self_refresh: +tegra3_save_config: #if defined(CONFIG_ARCH_TEGRA_3x_SOC) || \ defined(CONFIG_ARCH_TEGRA_14x_SOC) || defined(CONFIG_ARCH_TEGRA_12x_SOC) @@ -1210,6 +1213,9 @@ padsave: padsave_done: dsb + mov pc, lr + +tegra3_sdram_self_refresh: #if defined(CONFIG_ARCH_TEGRA_3x_SOC) || \ defined(CONFIG_ARCH_TEGRA_14x_SOC) || defined(CONFIG_ARCH_TEGRA_12x_SOC) |