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authorScott Williams <scwilliams@nvidia.com>2011-08-09 18:14:11 -0700
committerDan Willemsen <dwillemsen@nvidia.com>2011-11-30 21:47:03 -0800
commit7b6aed43ac4deef93e61e5f76d68099cf2c6540d (patch)
tree6355ffac82d31191901394e7df950cc5176885c2 /arch/arm/mach-tegra/sleep.S
parent9f49e8468bf3cab50e0618df948b26920bd7e161 (diff)
ARM: tegra2: power: Don't flush D-cache on aborted LP2 with L2
Don't try to flush the L1 D-cache for an aborted LP2 on the secondary CPU if the L2 cache is enabled. The L1 cache will have already been flushed and disabled by the suspend-side code. Change-Id: If6fc7bd0f7d630e6cdcda6824411503f346c5405 Signed-off-by: Scott Williams <scwilliams@nvidia.com> Rebase-Id: Rc50e525a320986432d2b125f82f846f94f605cc3
Diffstat (limited to 'arch/arm/mach-tegra/sleep.S')
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