diff options
| author | Scott Williams <scwilliams@nvidia.com> | 2011-08-03 19:07:51 -0700 |
|---|---|---|
| committer | Dan Willemsen <dwillemsen@nvidia.com> | 2011-11-30 21:47:01 -0800 |
| commit | eebc91326681f02111bd463ef40d8f9286ee24bf (patch) | |
| tree | fa7b043f636cd50ea3e334b42d237319fa44e7ee /arch/arm/mach-tegra/sleep.S | |
| parent | e6cb97db16e4eed8b56be29b0a7035866aa90d98 (diff) | |
ARM: tegra: power: Consolidate CPU context save and SMP exit
Every call to tegra_cpu_save is always followed by a call to
tegra_cpu_exit_coherency. Simplify the callers of tegra_cpu_save
by folding the CPU context save functionality of cpu_suspend and
the coherency exit functionality into a single function called
tegra_cpu_suspend.
Change-Id: Ia71a663b2971685712d5b8a2b7e8b44fe1526f40
Signed-off-by: Scott Williams <scwilliams@nvidia.com>
Rebase-Id: R36c0c5f44608d0c099d928e19e36af2e7ba061d8
Diffstat (limited to 'arch/arm/mach-tegra/sleep.S')
| -rw-r--r-- | arch/arm/mach-tegra/sleep.S | 25 |
1 files changed, 22 insertions, 3 deletions
diff --git a/arch/arm/mach-tegra/sleep.S b/arch/arm/mach-tegra/sleep.S index 9b436c9512a2..b25f01ce5a47 100644 --- a/arch/arm/mach-tegra/sleep.S +++ b/arch/arm/mach-tegra/sleep.S @@ -143,6 +143,26 @@ ENTRY(tegra_cpu_exit_coherency) ENDPROC(tegra_cpu_exit_coherency) /* + * tegra_cpu_suspend + * + * Save CPU suspend state + * + * Input: + * r1 = v:p offset + * r3 = virtual return function + * Output: + * sp is decremented to allocate space for CPU state on stack + * r0-r3,r8-r10,lr corrupted + */ + +ENTRY(tegra_cpu_suspend) + mov r8, lr + bl cpu_suspend + exit_smp r0, r2 + mov pc, r8 +ENDPROC(tegra_cpu_suspend) + +/* * tegra_cpu_save * * Input: @@ -151,7 +171,7 @@ ENDPROC(tegra_cpu_exit_coherency) * Output: * r0 = v:p offset * r7 = SP after saving the registers but before cpu_suspend, suitable - * for restoring an aborted suspend that does not call cpu_resume + * for restoring an aborted suspend * sp = SP after cpu_suspend (the 'real' SP) * Saves r4-r11 on the stack * Corrupts r1, r3-r10 @@ -172,7 +192,7 @@ ENTRY(tegra_cpu_save) mov r5, r0 mov r6, r2 mov r1, r0 - bl cpu_suspend + bl tegra_cpu_suspend mov lr, r4 mov r0, r5 mov r2, r6 @@ -188,7 +208,6 @@ ENDPROC(tegra_cpu_save) ENTRY(tegra_sleep_cpu) mov r3, lr @ set resume address to lr bl tegra_cpu_save - bl tegra_cpu_exit_coherency #ifdef CONFIG_ARCH_TEGRA_2x_SOC mov32 r1, tegra2_tear_down_cpu |