diff options
| author | Scott Williams <scwilliams@nvidia.com> | 2011-08-03 21:38:01 -0700 |
|---|---|---|
| committer | Dan Willemsen <dwillemsen@nvidia.com> | 2013-09-14 00:56:01 -0700 |
| commit | a8cbf0d3e67d4e8b867dc6283ce4c975fe3ed061 (patch) | |
| tree | 998c146466021af2db28395b02573f256aaa84e0 /arch/arm/mach-tegra/sleep.S | |
| parent | d37192e8cde8a1e3d361382a5e885d1a811e3ae9 (diff) | |
ARM: tegra: power: Use uniform save/restore register set
Modify the register usage of tegra_cpu_save so that the same set
of registers is saved to and restored from the stack.
Change-Id: I9a0e3ce80e0e1d4b47cbb984fb732fd612bf2c16
Signed-off-by: Scott Williams <scwilliams@nvidia.com>
Rebase-Id: R89e119278eb1d8f10f3c4e1c3c3203628de37a59
Diffstat (limited to 'arch/arm/mach-tegra/sleep.S')
| -rw-r--r-- | arch/arm/mach-tegra/sleep.S | 14 |
1 files changed, 7 insertions, 7 deletions
diff --git a/arch/arm/mach-tegra/sleep.S b/arch/arm/mach-tegra/sleep.S index df04071b052a..a0dbb1cbf76e 100644 --- a/arch/arm/mach-tegra/sleep.S +++ b/arch/arm/mach-tegra/sleep.S @@ -139,7 +139,8 @@ ENDPROC(tegra_cpu_suspend) * * Input: * r0 = v:p offset - * r3 = resume address + * r12 = return to the caller of this function + * lr = resume address * Output: * r0 = v:p offset * r7 = SP after saving the registers but before cpu_suspend, suitable @@ -151,7 +152,7 @@ ENDPROC(tegra_cpu_suspend) ENTRY(tegra_cpu_save) stmfd sp!, {r4 - r11} - stmfd sp!, {r3} + stmfd sp!, {lr} /* FIXME: The next two instructions should be removed if our change to save the diagnostic regsiter in the CPU context is accepted. */ mrc p15, 0, r4, c15, c0, 1 @ read diagnostic register @@ -160,15 +161,14 @@ ENTRY(tegra_cpu_save) adr r3, tegra_cpu_resume mov r7, sp - mov r4, lr + mov r4, r12 mov r5, r0 mov r6, r2 mov r1, r0 bl tegra_cpu_suspend - mov lr, r4 mov r0, r5 mov r2, r6 - mov pc, lr + mov pc, r4 ENDPROC(tegra_cpu_save) /* @@ -178,8 +178,8 @@ ENDPROC(tegra_cpu_save) * tegra?_tear_down_cpu */ ENTRY(tegra_sleep_cpu) - mov r3, lr @ set resume address to lr - bl tegra_cpu_save + mov r12, pc @ return here is via r12 + b tegra_cpu_save #ifdef CONFIG_ARCH_TEGRA_2x_SOC mov32 r1, tegra2_tear_down_cpu |