diff options
author | Scott Williams <scwilliams@nvidia.com> | 2011-07-21 12:16:18 -0700 |
---|---|---|
committer | Dan Willemsen <dwillemsen@nvidia.com> | 2012-03-22 23:27:09 -0700 |
commit | f24da5015eb8b9c21b2744e8f0be0687e1a438d0 (patch) | |
tree | 831dc1da97abed0a5c6f824205e49413afc6207b /arch/arm/mach-tegra/sleep.S | |
parent | de7cd6bc39f624e43e1fea488684ed9370075404 (diff) |
ARM: tegra: power: Align MMU shutdown code to L1 cache line
The MMU shutdown code must be aligned to an L1 cache line boundary.
Change-Id: Ib6c976470983b7f69b45e720104fc65cae54e162
Signed-off-by: Scott Williams <scwilliams@nvidia.com>
Signed-off-by: Dan Willemsen <dwillemsen@nvidia.com>
Rebase-Id: R305325117ba1debc8d112b4c3596c158df98d75e
Diffstat (limited to 'arch/arm/mach-tegra/sleep.S')
-rw-r--r-- | arch/arm/mach-tegra/sleep.S | 1 |
1 files changed, 1 insertions, 0 deletions
diff --git a/arch/arm/mach-tegra/sleep.S b/arch/arm/mach-tegra/sleep.S index 5b8a81b9a8e2..915a7b467f52 100644 --- a/arch/arm/mach-tegra/sleep.S +++ b/arch/arm/mach-tegra/sleep.S @@ -260,6 +260,7 @@ tegra_pgd_phys_address: * called with VA=PA mapping * turns off MMU, icache, dcache and branch prediction */ + .align L1_CACHE_SHIFT tegra_shut_off_mmu: mrc p15, 0, r3, c1, c0, 0 movw r2, #(1 << 12) | (1 << 11) | (1 << 2) | (1 << 0) |