diff options
| author | Bo Yan <byan@nvidia.com> | 2013-03-21 15:15:32 -0700 |
|---|---|---|
| committer | Dan Willemsen <dwillemsen@nvidia.com> | 2013-09-14 13:05:49 -0700 |
| commit | 73173035de33a5098a501ffa4d7f9e5ed5709b7a (patch) | |
| tree | c02c4d9e3f3a2f2d701f53540fdd9d6086a48fde /arch/arm/mach-tegra/sleep.h | |
| parent | 5e0fd1d7466be09c7a6d55ab74658e81c9aefc48 (diff) | |
ARM: tegra114: Implement ARM errata 799270 properly
The ARM errata 799270 requires a data dependency between the returning
device load data and MCR instruction that sets ACTLR.SMP bit. Fix the
current workaround so it confirms to errata document.
bug 1195192
Change-Id: Ideeb3dd3d865323d59ae4bc7a2d40889acfe379d
Signed-off-by: Bo Yan <byan@nvidia.com>
Reviewed-on: http://git-master/r/211812
(cherry picked from commit 6b738d1059962d80857b09d70a8878915f17c39e)
Reviewed-on: http://git-master/r/213133
Reviewed-by: Simone Willett <swillett@nvidia.com>
Tested-by: Simone Willett <swillett@nvidia.com>
Diffstat (limited to 'arch/arm/mach-tegra/sleep.h')
| -rw-r--r-- | arch/arm/mach-tegra/sleep.h | 7 |
1 files changed, 7 insertions, 0 deletions
diff --git a/arch/arm/mach-tegra/sleep.h b/arch/arm/mach-tegra/sleep.h index 372cf648514d..cdec743c22e2 100644 --- a/arch/arm/mach-tegra/sleep.h +++ b/arch/arm/mach-tegra/sleep.h @@ -233,8 +233,15 @@ .macro exit_smp, tmp1, tmp2 mrc p15, 0, \tmp1, c1, c0, 1 @ ACTLR bic \tmp1, \tmp1, #(1<<6) | (1<<0) @ clear ACTLR.SMP | ACTLR.FW +#ifdef CONFIG_ARM_ERRATA_799270 + ldr \tmp2, =TEGRA_CLK_RESET_VIRT + ldr \tmp2, [\tmp2, #0x70] @ BOND_OUT_L + and \tmp2, \tmp2, #0 + orr \tmp1, \tmp1, \tmp2 +#endif mcr p15, 0, \tmp1, c1, c0, 1 @ ACTLR isb + dsb #ifdef CONFIG_HAVE_ARM_SCU cpu_id \tmp1 mov \tmp1, \tmp1, lsl #2 |