[ARM/tegra] lp2: use clk_get_rate to read APB frequency

Change-Id: I8f9ea2e5502e33cba76fda572b6d20f916a20cab

1 files changed, 24 insertions, 8 deletions

diff --git a/arch/arm/mach-tegra/suspend.c b/arch/arm/mach-tegra/suspend.c
index 63e7c4bc67a7..c22d00044e40 100644
--- a/arch/arm/mach-tegra/suspend.c
+++ b/arch/arm/mach-tegra/suspend.c
@@ -27,6 +27,7 @@
 #include <linux/smp.h>
 #include <linux/irq.h>
 #include <linux/interrupt.h>
+#include <linux/clk.h>
 
 #include <asm/cacheflush.h>
 #include <asm/hardware/gic.h>
@@ -79,12 +80,26 @@ static void __iomem *tmrus = IO_ADDRESS(TEGRA_TMRUS_BASE);
 #define FLOW_CTRL_CPU_CSR	0x8
 #define FLOW_CTRL_CPU1_CSR	0x18
 
-static unsigned int powergood_time(unsigned int us, unsigned int hz)
+static void set_powergood_time(unsigned int us)
 {
-	unsigned long long ticks = us;
-	ticks *= hz;
-	do_div(ticks, 1000000);
-	return (unsigned int)ticks;
+	static int last_pclk = 0;
+	static struct clk *clk = NULL;
+	unsigned long long ticks;
+	unsigned long long pclk;
+
+	if (!clk) {
+		clk = clk_get_sys(NULL, "pclk");
+		BUG_ON(!clk);
+	}
+
+	pclk = clk_get_rate(clk);
+	if (pclk != last_pclk) {
+		ticks = (us * pclk) + 999999ull;
+		do_div(ticks, 1000000);
+		writel((unsigned int)ticks, pmc + PMC_CPUPWRGOOD_TIMER);
+		wmb();
+	}
+	last_pclk = pclk;
 }
 
 /*
@@ -169,9 +184,10 @@ unsigned int tegra_suspend_lp2(unsigned int us)
 	mode = TEGRA_POWER_CPU_PWRREQ_OE;
 	orig = readl(evp_reset);
 	writel(virt_to_phys(tegra_lp2_startup), evp_reset);
-	/* FIXME: power good time and APB clock rate should not be
-	 * hard-coded here. */
-	writel(powergood_time(2000, 13500000), pmc + PMC_CPUPWRGOOD_TIMER);
+
+	/* FIXME: power good time (in us) should come from the board file,
+	 * not hard-coded here. */
+	set_powergood_time(2000);
 
 	tegra_lp2_set_trigger(us);
 	suspend_cpu_complex();