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authorScott Williams <scwilliams@nvidia.com>2011-01-09 18:16:43 -0800
committerDan Willemsen <dwillemsen@nvidia.com>2011-04-26 15:49:13 -0700
commit9822a35c6a00b3e58b30b9f0289bc67df079c24a (patch)
tree0c20035cf42e197513bddb5bc3f378eb1a53d698 /arch/arm/mach-tegra/suspend.c
parentb34643ac47221984906579b2c8d5fa8d29e9ccf1 (diff)
arm: tegra: Decouple CONFIG_PM and CONFIG_CPU_IDLE
Allow CONFIG_PM and CONFIG_CPU_IDLE to be set independently of each other. Original-Change-Id: I06a095a5c89fd98816bc237a790cd279f0792b2e Reviewed-on: http://git-master/r/15365 Tested-by: Scott Williams <scwilliams@nvidia.com> Reviewed-by: Aleksandr Frid <afrid@nvidia.com> Reviewed-by: Scott Williams <scwilliams@nvidia.com> Change-Id: I8bb7863dfb431bf16642f7b266e1249b6035bad4
Diffstat (limited to 'arch/arm/mach-tegra/suspend.c')
-rw-r--r--arch/arm/mach-tegra/suspend.c25
1 files changed, 21 insertions, 4 deletions
diff --git a/arch/arm/mach-tegra/suspend.c b/arch/arm/mach-tegra/suspend.c
index 3543345728f8..0dba019ea5b7 100644
--- a/arch/arm/mach-tegra/suspend.c
+++ b/arch/arm/mach-tegra/suspend.c
@@ -101,12 +101,15 @@ struct suspend_context {
volatile struct suspend_context tegra_sctx;
-static void __iomem *pmc = IO_ADDRESS(TEGRA_PMC_BASE);
-#ifdef CONFIG_PM
+#if defined(CONFIG_PM) || defined(CONFIG_CPU_IDLE) || !defined(CONFIG_ARCH_TEGRA_2x_SOC)
static void __iomem *clk_rst = IO_ADDRESS(TEGRA_CLK_RESET_BASE);
static void __iomem *flow_ctrl = IO_ADDRESS(TEGRA_FLOW_CTRL_BASE);
static void __iomem *evp_reset = IO_ADDRESS(TEGRA_EXCEPTION_VECTORS_BASE)+0x100;
static void __iomem *tmrus = IO_ADDRESS(TEGRA_TMRUS_BASE);
+static void __iomem *pmc = IO_ADDRESS(TEGRA_PMC_BASE);
+#endif
+#ifdef CONFIG_PM
+static unsigned long wb0_restore = 0;
#endif
#define PMC_CTRL 0x0
@@ -165,7 +168,6 @@ void *tegra_context_area = NULL;
static struct clk *tegra_pclk = NULL;
static const struct tegra_suspend_platform_data *pdata = NULL;
-static unsigned long wb0_restore = 0;
static enum tegra_suspend_mode current_suspend_mode;
static unsigned int tegra_time_in_suspend[32];
@@ -199,6 +201,7 @@ enum tegra_suspend_mode tegra_get_suspend_mode(void)
return pdata->suspend_mode;
}
+#if defined(CONFIG_PM) || defined(CONFIG_CPU_IDLE) || !defined(CONFIG_ARCH_TEGRA_2x_SOC)
static void set_power_timers(unsigned long us_on, unsigned long us_off,
long rate)
{
@@ -223,6 +226,7 @@ static void set_power_timers(unsigned long us_on, unsigned long us_off,
}
last_pclk = pclk;
}
+#endif
static int create_suspend_pgtable(void)
{
@@ -285,7 +289,7 @@ static int create_suspend_pgtable(void)
-#ifdef CONFIG_PM
+#if defined(CONFIG_PM) || defined(CONFIG_CPU_IDLE) || !defined(CONFIG_ARCH_TEGRA_2x_SOC)
/*
* suspend_cpu_complex
*
@@ -455,7 +459,9 @@ unsigned int tegra_suspend_lp2(unsigned int us, unsigned int flags)
return remain;
}
+#endif
+#ifdef CONFIG_PM
/* ensures that sufficient time is passed for a register write to
* serialize into the 32KHz domain */
static void pmc_32kwritel(u32 val, unsigned long offs)
@@ -776,6 +782,7 @@ void __init tegra_init_suspend(struct tegra_suspend_platform_data *plat)
(void)reg;
(void)mode;
+#ifdef CONFIG_PM
if (plat->suspend_mode == TEGRA_SUSPEND_LP0) {
if (tegra_lp0_vec_size)
wb0_restore = tegra_lp0_vec_start;
@@ -785,10 +792,20 @@ void __init tegra_init_suspend(struct tegra_suspend_platform_data *plat)
plat->suspend_mode = TEGRA_SUSPEND_LP1;
}
}
+#else
+ if ((plat->suspend_mode == TEGRA_SUSPEND_LP0) ||
+ (plat->suspend_mode == TEGRA_SUSPEND_LP1)) {
+ pr_warning("Suspend mode LP0 or LP2 requested, CONFIG_PM not set\n");
+ pr_warning("Limiting to LP2\n");
+ plat->suspend_mode = TEGRA_SUSPEND_LP2;
+ }
+#endif
+#ifdef CONFIG_CPU_IDLE
if (plat->suspend_mode == TEGRA_SUSPEND_NONE) {
tegra_lp2_in_idle(false);
}
+#endif
tegra_context_area = kzalloc(CONTEXT_SIZE_BYTES * NR_CPUS, GFP_KERNEL);