diff options
author | Scott Williams <scwilliams@nvidia.com> | 2011-01-05 17:19:58 -0800 |
---|---|---|
committer | Dan Willemsen <dwillemsen@nvidia.com> | 2011-11-30 21:42:07 -0800 |
commit | 3491c2df4e2f75a28c9c7d146d0796035651c405 (patch) | |
tree | 3558eb35b01be057b9cfedc62d30c3f48940cf01 /arch/arm/mach-tegra/sysfs-dcc.c | |
parent | 1245c8eeb1ff50bde80728b92075ebfa61511586 (diff) |
arm: tegra: Enable DCC sysfs device node
Original-Change-Id: Ifdad566dfc809771de5f66301d3a8a98a49bb679
Reviewed-on: http://git-master/r/15079
Tested-by: Scott Williams <scwilliams@nvidia.com>
Reviewed-by: Scott Williams <scwilliams@nvidia.com>
Original-Change-Id: I47af8814b72786b52c25e824c79ccf4e52ca0b62
Rebase-Id: R2f4ae262a94e887f88f749bd0a1103b201e1b3c5
Diffstat (limited to 'arch/arm/mach-tegra/sysfs-dcc.c')
-rw-r--r-- | arch/arm/mach-tegra/sysfs-dcc.c | 33 |
1 files changed, 10 insertions, 23 deletions
diff --git a/arch/arm/mach-tegra/sysfs-dcc.c b/arch/arm/mach-tegra/sysfs-dcc.c index fb1cf92b1641..a4dc9a721354 100644 --- a/arch/arm/mach-tegra/sysfs-dcc.c +++ b/arch/arm/mach-tegra/sysfs-dcc.c @@ -1,5 +1,5 @@ /* - * Copyright (c) 2010 NVIDIA Corporation. + * Copyright (c) 2010-2011 NVIDIA Corporation. * All rights reserved. * * Redistribution and use in source and binary forms, with or without @@ -36,9 +36,10 @@ #include <linux/sysfs.h> #include <linux/workqueue.h> #include <linux/kobject.h> -#include "nvos.h" +#include <linux/hrtimer.h> +#include <linux/slab.h> -#define DCC_TIMEOUT_US 100000 /* Delay time for DCC timeout (in US) */ +#define DCC_TIMEOUT_US 100000 /* Delay time for DCC timeout (in uS) */ #define CP14_DSCR_WDTRFULL 0x20000000 /* Write Data Transfer Register Full */ #define SYSFS_DCC_DEBUG_PRINTS 0 /* Set non-zero to enable debug prints */ @@ -65,7 +66,7 @@ static struct kobj_attribute nvdcc_attr = static int write_to_dcc(u32 c) { - volatile NvU32 dscr; + volatile u32 dscr; /* Have we already determined that there is no debugger connected? */ if (DebuggerConnected < 0) @@ -81,10 +82,8 @@ static int write_to_dcc(u32 c) * period, ignore this write and disable further DCC accesses. */ if (dscr & CP14_DSCR_WDTRFULL) { - NvU64 start = NvOsGetTimeUS(); - NvU64 end = start + DCC_TIMEOUT_US; - NvU64 offset = (end > start) ? 0 : 0 - start; - NvU64 now; + ktime_t end = ktime_add_ns(ktime_get(), DCC_TIMEOUT_US * 1000); + ktime_t now; for (;;) { @@ -94,23 +93,11 @@ static int write_to_dcc(u32 c) /* Previous data still there? */ if (dscr & CP14_DSCR_WDTRFULL) { - if (end > start) - { - now = NvOsGetTimeUS(); + now = ktime_get(); - if ((now >= end) || (now < start)) - { - goto fail; - } - } - else + if (ktime_to_ns(now) >= ktime_to_ns(end)) { - now = offset + NvOsGetTimeUS(); - - if (now >= (end + offset)) - { - goto fail; - } + goto fail; } } else |