diff options
author | Diwakar Tundlam <dtundlam@nvidia.com> | 2014-08-05 19:14:28 -0700 |
---|---|---|
committer | Winnie Hsu <whsu@nvidia.com> | 2014-08-18 18:31:19 -0700 |
commit | ff75bfb37ffa80305a080f8ea727f452a5001667 (patch) | |
tree | 24d46cdc7151e70541aaa58cfda52462e090d118 /arch/arm/mach-tegra/tegra11_soctherm.c | |
parent | c47b0a3654c13641b007770d9ba86ce2ee9e9225 (diff) |
arm: tegra: soctherm: revert reprogram suppression
Suppressing reprogramming HW registers saves very little but can
potentially result in suppressing all HW interrupts from soctherm.
Bug 1536511
Change-Id: I57a78f7955089c60dde89e81ed8d88d9f408f364
Signed-off-by: Diwakar Tundlam <dtundlam@nvidia.com>
Reviewed-on: http://git-master/r/453269
(cherry picked from commit d4428beada43ba8849eb98ec1e42e13e60fe5c4b)
Reviewed-on: http://git-master/r/456766
Reviewed-by: Automatic_Commit_Validation_User
GVS: Gerrit_Virtual_Submit
Diffstat (limited to 'arch/arm/mach-tegra/tegra11_soctherm.c')
-rw-r--r-- | arch/arm/mach-tegra/tegra11_soctherm.c | 50 |
1 files changed, 11 insertions, 39 deletions
diff --git a/arch/arm/mach-tegra/tegra11_soctherm.c b/arch/arm/mach-tegra/tegra11_soctherm.c index bbe96a413788..5a2140234ec1 100644 --- a/arch/arm/mach-tegra/tegra11_soctherm.c +++ b/arch/arm/mach-tegra/tegra11_soctherm.c @@ -980,22 +980,12 @@ static inline void prog_hw_shutdown(struct thermal_trip_info *trip_state, * * Configure sensor group @therm to engage a hardware throttling response at * the threshold indicated by @trip_state. - * - * Checks to see if HW config register needs reprogramming: - * - * There's an intentional side-effect of writing trip temperature thresholds - * in HW; It resets the up/down state machine that track hysteresis and can - * cause unnecessary thermal events (interrupts). - * - * Avoid unnecessary events by checking if the trip config register is - * being configured to the same settings and skipping the write. */ static inline void prog_hw_threshold(struct thermal_trip_info *trip_state, int therm, int throt) { u32 r, reg_off; int temp; - bool reprogram; int cpu_throt, gpu_throt; temp = enforce_temp_range(trip_state->trip_temp) / 1000; @@ -1015,20 +1005,12 @@ static inline void prog_hw_threshold(struct thermal_trip_info *trip_state, } r = soctherm_readl(reg_off); - reprogram = ((REG_GET(r, CTL_LVL0_CPU0_DN_THRESH) != temp) || - (REG_GET(r, CTL_LVL0_CPU0_UP_THRESH) != temp) || - (REG_GET(r, CTL_LVL0_CPU0_CPU_THROT) != cpu_throt) || - (REG_GET(r, CTL_LVL0_CPU0_GPU_THROT) != gpu_throt) || - (REG_GET(r, CTL_LVL0_CPU0_EN) != 1)); - - if (reprogram) { - r = REG_SET(r, CTL_LVL0_CPU0_UP_THRESH, temp); - r = REG_SET(r, CTL_LVL0_CPU0_DN_THRESH, temp); - r = REG_SET(r, CTL_LVL0_CPU0_CPU_THROT, cpu_throt); - r = REG_SET(r, CTL_LVL0_CPU0_GPU_THROT, gpu_throt); - r = REG_SET(r, CTL_LVL0_CPU0_EN, 1); - soctherm_writel(r, reg_off); - } + r = REG_SET(r, CTL_LVL0_CPU0_UP_THRESH, temp); + r = REG_SET(r, CTL_LVL0_CPU0_DN_THRESH, temp); + r = REG_SET(r, CTL_LVL0_CPU0_CPU_THROT, cpu_throt); + r = REG_SET(r, CTL_LVL0_CPU0_GPU_THROT, gpu_throt); + r = REG_SET(r, CTL_LVL0_CPU0_EN, 1); + soctherm_writel(r, reg_off); } /** @@ -1040,33 +1022,23 @@ static inline void prog_hw_threshold(struct thermal_trip_info *trip_state, * * Configures sensor group @therm to raise an interrupt when temperature goes * above @hi_limit or below @lo_limit. - * - * Checks to see if HW config register needs reprogramming. See comment in - * prog_hw_threshold(). */ static void soctherm_set_limits(enum soctherm_therm_id therm, long lo_limit, long hi_limit) { u32 r, reg_off; int rlo_limit, rhi_limit; - bool reprogram; rlo_limit = LOWER_PRECISION_FOR_TEMP(lo_limit) / 1000; rhi_limit = LOWER_PRECISION_FOR_TEMP(hi_limit) / 1000; reg_off = TS_THERM_REG_OFFSET(CTL_LVL0_CPU0, 0, therm); - r = soctherm_readl(reg_off); - - reprogram = ((REG_GET(r, CTL_LVL0_CPU0_DN_THRESH) != rlo_limit) || - (REG_GET(r, CTL_LVL0_CPU0_UP_THRESH) != rhi_limit) || - (REG_GET(r, CTL_LVL0_CPU0_EN) != 1)); - if (reprogram) { - r = REG_SET(r, CTL_LVL0_CPU0_DN_THRESH, rlo_limit); - r = REG_SET(r, CTL_LVL0_CPU0_UP_THRESH, rhi_limit); - r = REG_SET(r, CTL_LVL0_CPU0_EN, 1); - soctherm_writel(r, reg_off); - } + r = soctherm_readl(reg_off); + r = REG_SET(r, CTL_LVL0_CPU0_DN_THRESH, rlo_limit); + r = REG_SET(r, CTL_LVL0_CPU0_UP_THRESH, rhi_limit); + r = REG_SET(r, CTL_LVL0_CPU0_EN, 1); + soctherm_writel(r, reg_off); switch (therm) { case THERM_CPU: |