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authorKrishna Sitaraman <ksitaraman@nvidia.com>2014-04-15 15:41:04 -0700
committerSeema Khowala <seemaj@nvidia.com>2014-04-23 14:05:57 -0700
commit69685534e1485f031c17d05b91a62284aba1e229 (patch)
treee98d56ad6d2393d37492974434db9e0fdfd0ab86 /arch/arm/mach-tegra/tegra13_dvfs.c
parent890715683064492a815f168044b7352c6fb86958 (diff)
ARM: T132: DVFS: Add sor0 clock to dvfs table
soc dvfs version p4v7 Bug 1497005 Bug 1442659 Change-Id: I357db8a0c0417214a1a749cb1160ef5154a0933c Signed-off-by: Krishna Sitaraman <ksitaraman@nvidia.com> Reviewed-on: http://git-master/r/396661 Reviewed-by: Aleksandr Frid <afrid@nvidia.com> Reviewed-by: Chao Xu <cxu@nvidia.com>
Diffstat (limited to 'arch/arm/mach-tegra/tegra13_dvfs.c')
-rw-r--r--arch/arm/mach-tegra/tegra13_dvfs.c5
1 files changed, 4 insertions, 1 deletions
diff --git a/arch/arm/mach-tegra/tegra13_dvfs.c b/arch/arm/mach-tegra/tegra13_dvfs.c
index 5eff4bf63e86..4aba01cab714 100644
--- a/arch/arm/mach-tegra/tegra13_dvfs.c
+++ b/arch/arm/mach-tegra/tegra13_dvfs.c
@@ -98,7 +98,7 @@ static struct dvfs_rail tegra13_dvfs_rail_vdd_cpu = {
static struct dvfs_rail tegra13_dvfs_rail_vdd_core = {
.reg_id = "vdd_core",
- .version = "p4v4",
+ .version = "p4v7",
.max_millivolts = 1400,
.min_millivolts = 800,
.step = VDD_SAFE_STEP,
@@ -395,6 +395,9 @@ static struct dvfs core_dvfs_table[] = {
CORE_DVFS("hda", -1, -1, 1, KHZ, 1, 108000, 108000, 108000, 108000, 108000 , 108000, 108000),
CORE_DVFS("hda2codec_2x", -1, -1, 1, KHZ, 1, 48000, 48000, 48000, 48000, 48000 , 48000, 48000),
+ CORE_DVFS("sor0", 0, 0, 1, KHZ, 1, 270000, 540000, 540000, 540000, 540000, 540000, 540000),
+ CORE_DVFS("sor0", 0, 1, 1, KHZ, 162000, 270000, 540000, 540000, 540000, 540000, 540000, 540000),
+
OVRRD_DVFS("sdmmc1", -1, -1, 1, KHZ, 1, 1, 82000, 82000, 136000, 136000, 136000, 204000),
OVRRD_DVFS("sdmmc3", -1, -1, 1, KHZ, 1, 1, 82000, 82000, 136000, 136000, 136000, 204000),
OVRRD_DVFS("sdmmc4", -1, -1, 1, KHZ, 1, 1, 82000, 82000, 136000, 136000, 136000, 200000),