ARM: tegra: cpufreq: Add cpu frequency table selection

Define cpu frequency tables for different tegra2 CPU clock ranges,
and add matching selection mechanism for scaling table as well as
throttling limits.

Original-Change-Id: I06b13f150d72f8a80f879ecf80ed44cc1f63bad4
Reviewed-on: http://git-master/r/16076
Reviewed-by: Aleksandr Frid <afrid@nvidia.com>
Tested-by: Aleksandr Frid <afrid@nvidia.com>
Reviewed-by: Bharat Nihalani <bnihalani@nvidia.com>

Rebase-Id: Rc69b8d00284b7bc164d47beb3615b712bfc2c25c

1 files changed, 67 insertions, 0 deletions

diff --git a/arch/arm/mach-tegra/tegra2_clocks.c b/arch/arm/mach-tegra/tegra2_clocks.c
index 68b79094a3df..95eef1652a18 100644
--- a/arch/arm/mach-tegra/tegra2_clocks.c
+++ b/arch/arm/mach-tegra/tegra2_clocks.c
@@ -26,6 +26,7 @@
 #include <linux/clkdev.h>
 #include <linux/clk.h>
 #include <linux/syscore_ops.h>
+#include <linux/cpufreq.h>
 
 #include <mach/iomap.h>
 
@@ -2315,6 +2316,72 @@ static void tegra2_init_one_clock(struct clk *c)
 	clkdev_add(&c->lookup);
 }
 
+#ifdef CONFIG_CPU_FREQ
+
+/*
+ * Frequency table index must be sequential starting at 0 and frequencies
+ * must be ascending.
+ */
+
+static struct cpufreq_frequency_table freq_table_750MHz[] = {
+	{ 0, 216000 },
+	{ 1, 312000 },
+	{ 2, 456000 },
+	{ 3, 608000 },
+	{ 4, 750000 },
+	{ 5, CPUFREQ_TABLE_END },
+};
+
+static struct cpufreq_frequency_table freq_table_1p0GHz[] = {
+	{ 0, 216000 },
+	{ 1, 312000 },
+	{ 2, 456000 },
+	{ 3, 608000 },
+	{ 4, 760000 },
+	{ 5, 816000 },
+	{ 6, 912000 },
+	{ 7, 1000000 },
+	{ 8, CPUFREQ_TABLE_END },
+};
+
+static struct cpufreq_frequency_table freq_table_1p2GHz[] = {
+	{ 0, 216000 },
+	{ 1, 312000 },
+	{ 2, 456000 },
+	{ 3, 608000 },
+	{ 4, 760000 },
+	{ 5, 816000 },
+	{ 6, 912000 },
+	{ 7, 1000000 },
+	{ 8, 1200000 },
+	{ 9, CPUFREQ_TABLE_END },
+};
+
+static struct tegra_cpufreq_table_data cpufreq_tables[] = {
+	{ freq_table_750MHz, 1, 4 },
+	{ freq_table_1p0GHz, 2, 6 },
+	{ freq_table_1p2GHz, 2, 7 },
+};
+
+struct tegra_cpufreq_table_data *tegra_cpufreq_table_get(void)
+{
+	int i, ret;
+	struct clk *cpu_clk = tegra_get_clock_by_name("cpu");
+
+	for (i = 0; i < ARRAY_SIZE(cpufreq_tables); i++) {
+		struct cpufreq_policy policy;
+		ret = cpufreq_frequency_table_cpuinfo(
+			&policy, cpufreq_tables[i].freq_table);
+		BUG_ON(ret);
+		if ((policy.max * 1000) == cpu_clk->max_rate)
+			return &cpufreq_tables[i];
+	}
+	pr_err("%s: No cpufreq table matching cpu range", __func__);
+	BUG();
+	return &cpufreq_tables[0];
+}
+#endif
+
 #ifdef CONFIG_PM
 static u32 clk_rst_suspend[RST_DEVICES_NUM + CLK_OUT_ENB_NUM +
 			   PERIPH_CLK_SOURCE_NUM + 22];