diff options
author | Alex Frid <afrid@nvidia.com> | 2011-06-27 14:36:58 -0700 |
---|---|---|
committer | Dan Willemsen <dwillemsen@nvidia.com> | 2011-11-30 21:47:30 -0800 |
commit | 4d04ca864ba7dfb6898f7c8065aa49d59b7eddde (patch) | |
tree | 0bf0def9a597dbd912ee9a5f922a94cd72e7bcfa /arch/arm/mach-tegra/tegra2_clocks.c | |
parent | bcee00a3e0de825418c63d5340fbf794100610c3 (diff) |
ARM: tegra: clock: Use bus lock to protect shared bus update
Protected shared bus update with bus lock - common for all shared bus
users (update procedure was already covered by individual shared users
locks, but it did not prevent concurrent access to shared rates list).
Original-Change-Id: Ia0e6886265aff1f624802e0415fe8cecb887b507
Reviewed-on: http://git-master/r/39918
Reviewed-by: Varun Colbert <vcolbert@nvidia.com>
Tested-by: Varun Colbert <vcolbert@nvidia.com>
Rebase-Id: R0e0ee997ce9347470e207910f7b4f6c42143717f
Diffstat (limited to 'arch/arm/mach-tegra/tegra2_clocks.c')
-rw-r--r-- | arch/arm/mach-tegra/tegra2_clocks.c | 6 |
1 files changed, 5 insertions, 1 deletions
diff --git a/arch/arm/mach-tegra/tegra2_clocks.c b/arch/arm/mach-tegra/tegra2_clocks.c index 3c5561e02e11..f5125eaeddcd 100644 --- a/arch/arm/mach-tegra/tegra2_clocks.c +++ b/arch/arm/mach-tegra/tegra2_clocks.c @@ -159,6 +159,8 @@ static void __iomem *misc_gp_hidrev_base = IO_ADDRESS(TEGRA_APB_MISC_BASE); #define MISC_GP_HIDREV 0x804 +static int tegra2_clk_shared_bus_update(struct clk *bus); + /* * Some clocks share a register with other clocks. Any clock op that * non-atomically modifies a register used by another clock must lock @@ -525,6 +527,7 @@ static struct clk_ops tegra_virtual_sclk_ops = { .init = tegra2_virtual_sclk_init, .set_rate = tegra2_virtual_sclk_set_rate, .round_rate = tegra2_virtual_sclk_round_rate, + .shared_bus_update = tegra2_clk_shared_bus_update, }; /* virtual cop clock functions. Used to acquire the fake 'cop' clock to @@ -1280,6 +1283,7 @@ static struct clk_ops tegra_emc_clk_ops = { .set_rate = &tegra2_emc_clk_set_rate, .round_rate = &tegra2_emc_clk_round_rate, .reset = &tegra2_periph_clk_reset, + .shared_bus_update = &tegra2_clk_shared_bus_update, }; /* Clock doubler ops */ @@ -1452,7 +1456,7 @@ static struct clk_ops tegra_cdev_clk_ops = { * enabled shared_bus_user clock, with a minimum value set by the * shared bus. */ -static int tegra_clk_shared_bus_update(struct clk *bus) +static int tegra2_clk_shared_bus_update(struct clk *bus) { struct clk *c; unsigned long rate = bus->min_rate; |