diff options
author | Laxman Dewangan <ldewangan@nvidia.com> | 2011-06-03 23:53:28 +0530 |
---|---|---|
committer | Dan Willemsen <dwillemsen@nvidia.com> | 2011-11-30 21:42:45 -0800 |
commit | 55269866ffcf208977ac16fe9e40045607e3cb84 (patch) | |
tree | 5406e3cc0763bb9bd3ec710ad47ad1381d2b5a81 /arch/arm/mach-tegra/tegra2_clocks.c | |
parent | ec13d7ca4969030a9be9c19bb7d47e489fe406b9 (diff) |
arm: tegra: clock: Adding clock info for 8250 driver
Adding clock information in the clock table for the serial driver
8250.
bug 832273
Original-Change-Id: I45acf988d2cf79d28cf9467d89fbfab49141803e
Reviewed-on: http://git-master/r/35050
Reviewed-by: Niket Sirsi <nsirsi@nvidia.com>
Tested-by: Niket Sirsi <nsirsi@nvidia.com>
Rebase-Id: Rc396fb7e5545b276a15548d72bb4a0cbfb24942f
Diffstat (limited to 'arch/arm/mach-tegra/tegra2_clocks.c')
-rw-r--r-- | arch/arm/mach-tegra/tegra2_clocks.c | 20 |
1 files changed, 10 insertions, 10 deletions
diff --git a/arch/arm/mach-tegra/tegra2_clocks.c b/arch/arm/mach-tegra/tegra2_clocks.c index 74dd0c14e732..dfd67c97a85c 100644 --- a/arch/arm/mach-tegra/tegra2_clocks.c +++ b/arch/arm/mach-tegra/tegra2_clocks.c @@ -2322,11 +2322,11 @@ struct clk tegra_list_periph_clks[] = { PERIPH_CLK("i2c2", "tegra-i2c.1", NULL, 54, 0x198, 0x31E, 26000000, mux_pllp_pllc_pllm_clkm, MUX | DIV_U16 | PERIPH_ON_APB), PERIPH_CLK("i2c3", "tegra-i2c.2", NULL, 67, 0x1b8, 0x31E, 26000000, mux_pllp_pllc_pllm_clkm, MUX | DIV_U16 | PERIPH_ON_APB), PERIPH_CLK("dvc", "tegra-i2c.3", NULL, 47, 0x128, 0x31E, 26000000, mux_pllp_pllc_pllm_clkm, MUX | DIV_U16 | PERIPH_ON_APB), - PERIPH_CLK("uarta", "uart.0", NULL, 6, 0x178, 0x31E, 600000000, mux_pllp_pllc_pllm_clkm, MUX | PERIPH_ON_APB), - PERIPH_CLK("uartb", "uart.1", NULL, 7, 0x17c, 0x31E, 600000000, mux_pllp_pllc_pllm_clkm, MUX | PERIPH_ON_APB), - PERIPH_CLK("uartc", "uart.2", NULL, 55, 0x1a0, 0x31E, 600000000, mux_pllp_pllc_pllm_clkm, MUX | PERIPH_ON_APB), - PERIPH_CLK("uartd", "uart.3", NULL, 65, 0x1c0, 0x31E, 600000000, mux_pllp_pllc_pllm_clkm, MUX | PERIPH_ON_APB), - PERIPH_CLK("uarte", "uart.4", NULL, 66, 0x1c4, 0x31E, 600000000, mux_pllp_pllc_pllm_clkm, MUX | PERIPH_ON_APB), + PERIPH_CLK("uarta", "tegra_uart.0", "uarta", 6, 0x178, 0x31E, 600000000, mux_pllp_pllc_pllm_clkm, MUX | PERIPH_ON_APB), + PERIPH_CLK("uartb", "tegra_uart.1", "uartb", 7, 0x17c, 0x31E, 600000000, mux_pllp_pllc_pllm_clkm, MUX | PERIPH_ON_APB), + PERIPH_CLK("uartc", "tegra_uart.2", "uartc", 55, 0x1a0, 0x31E, 600000000, mux_pllp_pllc_pllm_clkm, MUX | PERIPH_ON_APB), + PERIPH_CLK("uartd", "tegra_uart.3", "uartd", 65, 0x1c0, 0x31E, 600000000, mux_pllp_pllc_pllm_clkm, MUX | PERIPH_ON_APB), + PERIPH_CLK("uarte", "tegra_uart.4", "uarte", 66, 0x1c4, 0x31E, 600000000, mux_pllp_pllc_pllm_clkm, MUX | PERIPH_ON_APB), PERIPH_CLK("3d", "3d", NULL, 24, 0x158, 0x31E, 300000000, mux_pllm_pllc_pllp_plla, MUX | DIV_U71 | PERIPH_MANUAL_RESET), /* scales with voltage and process_id */ PERIPH_CLK("2d", "2d", NULL, 21, 0x15c, 0x31E, 300000000, mux_pllm_pllc_pllp_plla, MUX | DIV_U71), /* scales with voltage and process_id */ PERIPH_CLK("vi", "tegra_camera", "vi", 20, 0x148, 0x31E, 150000000, mux_pllm_pllc_pllp_plla, MUX | DIV_U71), /* scales with voltage and process_id */ @@ -2386,11 +2386,11 @@ struct clk tegra_list_shared_clks[] = { * table under two names. */ struct clk_duplicate tegra_clk_duplicates[] = { - CLK_DUPLICATE("uarta", "tegra_uart.0", NULL), - CLK_DUPLICATE("uartb", "tegra_uart.1", NULL), - CLK_DUPLICATE("uartc", "tegra_uart.2", NULL), - CLK_DUPLICATE("uartd", "tegra_uart.3", NULL), - CLK_DUPLICATE("uarte", "tegra_uart.4", NULL), + CLK_DUPLICATE("uarta", "serial8250.0", "uarta"), + CLK_DUPLICATE("uartb", "serial8250.0", "uartb"), + CLK_DUPLICATE("uartc", "serial8250.0", "uartc"), + CLK_DUPLICATE("uartd", "serial8250.0", "uartd"), + CLK_DUPLICATE("uarte", "serial8250.0", "uarte"), CLK_DUPLICATE("usbd", "utmip-pad", NULL), CLK_DUPLICATE("usbd", "tegra-ehci.0", NULL), CLK_DUPLICATE("usbd", "tegra-otg", NULL), |