diff options
| author | Preetham Chandru <pchandru@nvidia.com> | 2011-09-08 20:43:56 +0530 |
|---|---|---|
| committer | Dan Willemsen <dwillemsen@nvidia.com> | 2012-03-22 23:48:16 -0700 |
| commit | 1731a8669f492572fd917ae2f6636c40d970c517 (patch) | |
| tree | baced8874ea00e4212ef745283acced73763ac76 /arch/arm/mach-tegra/tegra2_clocks.c | |
| parent | bf7a952d3d7f80903358860694b470671b949aa0 (diff) | |
ARM: tegra2: clock: Update bus operations
Relaxed bus set rate success condition: instead of checking for the
exact rate check for the closest rate. This makes bus clocks configurable
from sources/PLLs with variable frequencies.
Bug: 869054
Signed-off-by: Preetham Chandru <pchandru@nvidia.com>
Reviewed-on: http://git-master/r/50747
(cherry picked from commit 61313ed2494424513cb6e42c22cb7ca31f21473e)
Change-Id: Id4c9ff63da4cefb1d13888a627f0757a3b941994
Reviewed-on: http://git-master/r/56659
Tested-by: Preetham Chandru <pchandru@nvidia.com>
Reviewed-by: Aleksandr Frid <afrid@nvidia.com>
Reviewed-by: Mursalin Akon <makon@nvidia.com>
Reviewed-by: Allen Martin <amartin@nvidia.com>
Rebase-Id: R57ac9f6cebe9df5e02dadac345653e2f3cf23e83
Diffstat (limited to 'arch/arm/mach-tegra/tegra2_clocks.c')
| -rw-r--r-- | arch/arm/mach-tegra/tegra2_clocks.c | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/arch/arm/mach-tegra/tegra2_clocks.c b/arch/arm/mach-tegra/tegra2_clocks.c index 6b93c714e91d..92a267918476 100644 --- a/arch/arm/mach-tegra/tegra2_clocks.c +++ b/arch/arm/mach-tegra/tegra2_clocks.c @@ -596,7 +596,7 @@ static int tegra2_bus_clk_set_rate(struct clk *c, unsigned long rate) val = clk_readl(c->reg); for (i = 1; i <= 4; i++) { - if (rate == parent_rate / i) { + if (rate >= parent_rate / i) { val &= ~(BUS_CLK_DIV_MASK << c->reg_shift); val |= (i - 1) << c->reg_shift; clk_writel(val, c->reg); |