diff options
| author | Alex Frid <afrid@nvidia.com> | 2012-05-04 20:01:32 +0530 |
|---|---|---|
| committer | Varun Wadekar <vwadekar@nvidia.com> | 2012-05-04 20:01:32 +0530 |
| commit | 2082e961c0678e049a3f05c1c616174b6daa9239 (patch) | |
| tree | d339ca3d452c7dcf818ce7b7db6caa54f0be2075 /arch/arm/mach-tegra/tegra2_clocks.c | |
| parent | 01de6e66ae274879f2a34c2a35cb67c575676caa (diff) | |
ARM: tegra: clock: Add DSI implicit dependency on PLLP
Added dsi fixed clock entry derived from PLLP_OUT3. This would allow
DC driver to properly ref-count implicit dependency of DSI operations
on PLLP_OUT3 clock.
Bug 933653
Change-Id: I71e6ada13f9d231c5a4924f345cdbf7cf05cd59e
Signed-off-by: Alex Frid <afrid@nvidia.com>
Reviewed-on: http://git-master/r/98103
Reviewed-by: Rohan Somvanshi <rsomvanshi@nvidia.com>
Tested-by: Rohan Somvanshi <rsomvanshi@nvidia.com>
Conflicts:
arch/arm/mach-tegra/tegra3_clocks.c
Signed-off-by: Varun Wadekar <vwadekar@nvidia.com>
Diffstat (limited to 'arch/arm/mach-tegra/tegra2_clocks.c')
| -rw-r--r-- | arch/arm/mach-tegra/tegra2_clocks.c | 2 |
1 files changed, 2 insertions, 0 deletions
diff --git a/arch/arm/mach-tegra/tegra2_clocks.c b/arch/arm/mach-tegra/tegra2_clocks.c index 9ed007e35eda..6223f934f4bd 100644 --- a/arch/arm/mach-tegra/tegra2_clocks.c +++ b/arch/arm/mach-tegra/tegra2_clocks.c @@ -2545,6 +2545,8 @@ static struct clk tegra_list_periph_clks[] = { PERIPH_CLK("usb2", "tegra-ehci.1", NULL, 58, 0, 0x31E, 480000000, mux_clk_m, 0), /* requires min voltage */ PERIPH_CLK("usb3", "tegra-ehci.2", NULL, 59, 0, 0x31E, 480000000, mux_clk_m, 0), /* requires min voltage */ PERIPH_CLK("dsia", "tegradc.0", "dsia", 48, 0, 0x31E, 500000000, mux_plld_out0, 0), /* scales with voltage */ + PERIPH_CLK("dsi1-fixed", "tegradc.0", "dsi-fixed", 0, 0, 0x31E, 108000000, mux_pllp_out3, PERIPH_NO_ENB), + PERIPH_CLK("dsi2-fixed", "tegradc.1", "dsi-fixed", 0, 0, 0x31E, 108000000, mux_pllp_out3, PERIPH_NO_ENB), PERIPH_CLK("csi", "tegra_camera", "csi", 52, 0, 0x31E, 72000000, mux_pllp_out3, 0), PERIPH_CLK("isp", "tegra_camera", "isp", 23, 0, 0x31E, 150000000, mux_clk_m, 0), /* same frequency as VI */ PERIPH_CLK("csus", "tegra_camera", "csus", 92, 0, 0x31E, 150000000, mux_clk_m, PERIPH_NO_RESET), |