diff options
author | Shridhar Rasal <srasal@nvidia.com> | 2012-02-09 16:06:34 +0530 |
---|---|---|
committer | Varun Colbert <vcolbert@nvidia.com> | 2012-03-13 16:15:22 -0700 |
commit | f4bc69bbe822d1481a03bbf6477d90186c47ebbb (patch) | |
tree | 68d7821e0aef394ceaa5073bd3f32f4577394991 /arch/arm/mach-tegra/tegra2_dvfs.c | |
parent | 7cf0f9216afd9d9221f2daccd0b283247515e732 (diff) |
tegra2: dvfs: enable dvfs for sdmmc
Enabled dvfs table for sdmmc clocks
bug 893886
Reviewed-on: http://git-master/r/82687
(cherry picked from commit 45c6c0426fdde8d338d10029cc83b598e7e49e61)
Change-Id: I26e07b45ef6331b99c57dd792ad0cc66a94242fb
Signed-off-by: Shridhar Rasal <srasal@nvidia.com>
Reviewed-on: http://git-master/r/89410
Tested-by: Gerrit_Virtual_Submit
Reviewed-by: Bharat Nihalani <bnihalani@nvidia.com>
Diffstat (limited to 'arch/arm/mach-tegra/tegra2_dvfs.c')
-rw-r--r-- | arch/arm/mach-tegra/tegra2_dvfs.c | 8 |
1 files changed, 0 insertions, 8 deletions
diff --git a/arch/arm/mach-tegra/tegra2_dvfs.c b/arch/arm/mach-tegra/tegra2_dvfs.c index a864184140e6..a53033b00991 100644 --- a/arch/arm/mach-tegra/tegra2_dvfs.c +++ b/arch/arm/mach-tegra/tegra2_dvfs.c @@ -174,18 +174,10 @@ static struct dvfs dvfs_init[] = { /* Core voltages (mV): 950, 1000, 1100, 1200, 1225, 1275, 1300 */ CORE_DVFS("emc", -1, 1, KHZ, 57000, 333000, 380000, 666000, 666000, 666000, 760000), -#if 0 - /* - * The sdhci core calls the clock ops with a spinlock held, which - * conflicts with the sleeping dvfs api. - * For now, boards must ensure that the core voltage does not drop - * below 1V, or that the sdmmc busses are set to 44 MHz or less. - */ CORE_DVFS("sdmmc1", -1, 1, KHZ, 44000, 52000, 52000, 52000, 52000, 52000, 52000), CORE_DVFS("sdmmc2", -1, 1, KHZ, 44000, 52000, 52000, 52000, 52000, 52000, 52000), CORE_DVFS("sdmmc3", -1, 1, KHZ, 44000, 52000, 52000, 52000, 52000, 52000, 52000), CORE_DVFS("sdmmc4", -1, 1, KHZ, 44000, 52000, 52000, 52000, 52000, 52000, 52000), -#endif CORE_DVFS("ndflash", -1, 1, KHZ, 130000, 150000, 158000, 164000, 164000, 164000, 164000), CORE_DVFS("nor", -1, 1, KHZ, 0, 92000, 92000, 92000, 92000, 92000, 92000), |