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authorAlex Frid <afrid@nvidia.com>2014-03-31 11:49:51 -0700
committerKrishna Reddy <vdumpa@nvidia.com>2014-03-31 17:20:28 -0700
commit3580417b82fcfc887d8646385b28d58f87092a84 (patch)
tree8715cffe9a120e05cff1a868d7ecb4aa7505d4ae /arch/arm/mach-tegra/tegra3_actmon.c
parent34b33a4d65221d963ca66532f148f2239f3ff497 (diff)
ARM: tegra: power: Swap ActMon barrier and read fence
To assure completion of the previous writes through Tegra interconnect activity monitor code used memory write barrier followed by read fence. Removed the preceding memory barrier, since it has no additional to read fence effect (given Tegra IO mapping as device). Added barrier after read fence. The latter is needed to avoid partial overlap of read operation and propagation delay after read (if any). Such overlap is possible since architectural timer used as delay counter is not MMIO register. Bug 1484343 Change-Id: I71537f5c013ac2c3f04eea600d89ec333ec5ab19 Signed-off-by: Alex Frid <afrid@nvidia.com> Reviewed-on: http://git-master/r/390283 Reviewed-by: Hoang Pham <hopham@nvidia.com> Reviewed-by: Krishna Reddy <vdumpa@nvidia.com>
Diffstat (limited to 'arch/arm/mach-tegra/tegra3_actmon.c')
-rw-r--r--arch/arm/mach-tegra/tegra3_actmon.c2
1 files changed, 1 insertions, 1 deletions
diff --git a/arch/arm/mach-tegra/tegra3_actmon.c b/arch/arm/mach-tegra/tegra3_actmon.c
index c13ae38abd97..afdf5c3b2fbd 100644
--- a/arch/arm/mach-tegra/tegra3_actmon.c
+++ b/arch/arm/mach-tegra/tegra3_actmon.c
@@ -148,8 +148,8 @@ static inline void actmon_writel(u32 val, u32 offset)
}
static inline void actmon_wmb(void)
{
- wmb();
actmon_readl(ACTMON_GLB_STATUS);
+ dsb();
}
#define offs(x) (dev->reg + x)