diff options
| author | Juha Tukkinen <jtukkinen@nvidia.com> | 2012-04-11 16:47:29 +0300 |
|---|---|---|
| committer | Rohan Somvanshi <rsomvanshi@nvidia.com> | 2012-04-19 04:54:06 -0700 |
| commit | 20395e4c50ceea0d114c9beaaa5fa0e18b87915e (patch) | |
| tree | b9805bfeaf9be5aeb7e6aeb1f8d37061c618d077 /arch/arm/mach-tegra/tegra3_clocks.c | |
| parent | 8059ef65ae2efe2535301b9b26636c9fe6b4954e (diff) | |
ARM: tegra: remove T30 FPGA support
Remove T30 FPGA support as it will conflict with downstreaming mainline
way of using chipid and revision.
Change-Id: Ic1fd1107801de13c265c7dde8571e0537c43f4fd
Signed-off-by: Juha Tukkinen <jtukkinen@nvidia.com>
Reviewed-on: http://git-master/r/95872
Reviewed-by: Rohan Somvanshi <rsomvanshi@nvidia.com>
Tested-by: Rohan Somvanshi <rsomvanshi@nvidia.com>
Diffstat (limited to 'arch/arm/mach-tegra/tegra3_clocks.c')
| -rw-r--r-- | arch/arm/mach-tegra/tegra3_clocks.c | 5 |
1 files changed, 0 insertions, 5 deletions
diff --git a/arch/arm/mach-tegra/tegra3_clocks.c b/arch/arm/mach-tegra/tegra3_clocks.c index d5e101ec3502..b6fb8e5334a9 100644 --- a/arch/arm/mach-tegra/tegra3_clocks.c +++ b/arch/arm/mach-tegra/tegra3_clocks.c @@ -830,10 +830,6 @@ static int tegra3_cpu_clk_set_rate(struct clk *c, unsigned long rate) bool skip_to_backup = skip && (clk_get_rate_all_locked(c) >= SKIPPER_ENGAGE_RATE); - /* Hardware clock control is not possible on FPGA platforms. - Report success so that upper level layers don't complain - needlessly. */ -#ifndef CONFIG_TEGRA_FPGA_PLATFORM if (c->dvfs) { if (!c->dvfs->dvfs_rail) return -ENOSYS; @@ -912,7 +908,6 @@ out: tegra3_super_clk_skipper_update(c->parent, 2, 1); } clk_disable(c->u.cpu.main); -#endif return ret; } |