diff options
| author | Ray Poudrier <rapoudrier@nvidia.com> | 2012-02-09 20:27:17 -0800 |
|---|---|---|
| committer | Simone Willett <swillett@nvidia.com> | 2012-03-26 17:50:30 -0700 |
| commit | 1587c2928ad94f6bae1193b50ad67cc870ffa69b (patch) | |
| tree | 60c7cc3a385e74fd450f086d5d325103ed6d8a8a /arch/arm/mach-tegra/tegra3_dvfs.c | |
| parent | b2278739a19aaafac7ce46692c4cf7c687677e79 (diff) | |
ARM: tegra: dvfs: correct LCD frequency for 1V
Bug 841336
Reviewed-on: http://git-master/r/82996
(cherry picked from commit 5850c8f4968fd7acbb22e377a56a476e37ac5117)
Change-Id: I61d5c1576a6f5caf82b3efec2123c47eb64889b2
Signed-off-by: Ray Poudrier <rapoudrier@nvidia.com>
Reviewed-on: http://git-master/r/88865
Reviewed-by: Simone Willett <swillett@nvidia.com>
Tested-by: Simone Willett <swillett@nvidia.com>
Diffstat (limited to 'arch/arm/mach-tegra/tegra3_dvfs.c')
| -rw-r--r-- | arch/arm/mach-tegra/tegra3_dvfs.c | 8 |
1 files changed, 4 insertions, 4 deletions
diff --git a/arch/arm/mach-tegra/tegra3_dvfs.c b/arch/arm/mach-tegra/tegra3_dvfs.c index 54c026f519f3..48c4384b1aac 100644 --- a/arch/arm/mach-tegra/tegra3_dvfs.c +++ b/arch/arm/mach-tegra/tegra3_dvfs.c @@ -337,13 +337,13 @@ static struct dvfs core_dvfs_table[] = { * and let the display driver call tegra_dvfs_set_rate manually */ CORE_DVFS("disp1", 0, 0, KHZ, 1, 120000, 120000, 120000, 120000, 190000, 190000, 190000, 190000), - CORE_DVFS("disp1", 1, 0, KHZ, 1, 151000, 268000, 268000, 268000, 268000, 268000, 268000, 268000), - CORE_DVFS("disp1", 2, 0, KHZ, 1, 151000, 268000, 268000, 268000, 268000, 268000, 268000, 268000), + CORE_DVFS("disp1", 1, 0, KHZ, 1, 155000, 268000, 268000, 268000, 268000, 268000, 268000, 268000), + CORE_DVFS("disp1", 2, 0, KHZ, 1, 155000, 268000, 268000, 268000, 268000, 268000, 268000, 268000), CORE_DVFS("disp1", 3, 0, KHZ, 1, 120000, 120000, 120000, 120000, 190000, 190000, 190000, 190000), CORE_DVFS("disp2", 0, 0, KHZ, 1, 120000, 120000, 120000, 120000, 190000, 190000, 190000, 190000), - CORE_DVFS("disp2", 1, 0, KHZ, 1, 151000, 268000, 268000, 268000, 268000, 268000, 268000, 268000), - CORE_DVFS("disp2", 2, 0, KHZ, 1, 151000, 268000, 268000, 268000, 268000, 268000, 268000, 268000), + CORE_DVFS("disp2", 1, 0, KHZ, 1, 155000, 268000, 268000, 268000, 268000, 268000, 268000, 268000), + CORE_DVFS("disp2", 2, 0, KHZ, 1, 155000, 268000, 268000, 268000, 268000, 268000, 268000, 268000), CORE_DVFS("disp2", 3, 0, KHZ, 1, 120000, 120000, 120000, 120000, 190000, 190000, 190000, 190000), CORE_DVFS("pwm", -1, 1, KHZ, 1, 408000, 408000, 408000, 408000, 408000, 408000, 408000, 408000), |