diff options
| author | Alex Frid <afrid@nvidia.com> | 2011-11-18 22:46:04 -0800 |
|---|---|---|
| committer | Dan Willemsen <dwillemsen@nvidia.com> | 2011-11-30 21:50:25 -0800 |
| commit | d2a1d360abc87215e6474334bdf395800b732020 (patch) | |
| tree | ef43b8c639d4ee91e1f7e1acec01578c7833d731 /arch/arm/mach-tegra/tegra3_dvfs.c | |
| parent | 84a2d67dc80fe536d894854b7e29b6614accbfb5 (diff) | |
ARM: tegra: dvfs: Update Tegra3 xL speedo/nominal voltage
Updated Tegra3 xL core speedo and nominal voltage settings.
Re-factored nominal voltage selection, since new data introduced
dependency of core voltage on both CPU and core speedo id.
Bug 841336
Signed-off-by: Alex Frid <afrid@nvidia.com>
(cherry picked from commit 3330ce743434866502fd6b33d7d1718ec4ab4675)
(cherry picked from commit a9fb4cbc865e78706c72186ebac286506cd5b301)
Change-Id: I244df08153a6a275a2fe331c72e03d03f18a8ea1
Reviewed-on: http://git-master/r/67014
Reviewed-by: Diwakar Tundlam <dtundlam@nvidia.com>
Tested-by: Aleksandr Frid <afrid@nvidia.com>
Reviewed-by: Yu-Huan Hsu <yhsu@nvidia.com>
Rebase-Id: Rd35cb9ac1fbcb424548e05d10d5622744394e796
Diffstat (limited to 'arch/arm/mach-tegra/tegra3_dvfs.c')
| -rw-r--r-- | arch/arm/mach-tegra/tegra3_dvfs.c | 17 |
1 files changed, 3 insertions, 14 deletions
diff --git a/arch/arm/mach-tegra/tegra3_dvfs.c b/arch/arm/mach-tegra/tegra3_dvfs.c index de961f935b4e..4ec22d1b9485 100644 --- a/arch/arm/mach-tegra/tegra3_dvfs.c +++ b/arch/arm/mach-tegra/tegra3_dvfs.c @@ -37,14 +37,6 @@ static const int cpu_millivolts[MAX_DVFS_FREQS] = static const int core_millivolts[MAX_DVFS_FREQS] = {1000, 1050, 1100, 1150, 1200, 1250, 1300}; -static const int core_speedo_nominal_millivolts[] = -/* speedo_id 0, 1, 2 */ - { 1200, 1200, 1300 }; - -static const int cpu_speedo_nominal_millivolts[] = -/* speedo_id 0, 1, 2, 3, 4, 5, 6, 7, 8 */ - { 1125, 1150, 1150, 1150, 1237, 1237, 1237, 1150, 1150 }; - #define KHZ 1000 #define MHZ 1000000 @@ -425,7 +417,6 @@ static int __init get_cpu_nominal_mv_index( * nominal core voltage ("solve from cpu to core at nominal"). Clip * result to the nominal cpu level for the chips with this speedo_id. */ - BUG_ON(speedo_id >= ARRAY_SIZE(cpu_speedo_nominal_millivolts)); mv = tegra3_dvfs_rail_vdd_core.nominal_millivolts; for (i = 0; i < MAX_DVFS_FREQS; i++) { if ((cpu_millivolts[i] == 0) || @@ -435,7 +426,7 @@ static int __init get_cpu_nominal_mv_index( BUG_ON(i == 0); mv = cpu_millivolts[i - 1]; BUG_ON(mv < tegra3_dvfs_rail_vdd_cpu.min_millivolts); - mv = min(mv, cpu_speedo_nominal_millivolts[speedo_id]); + mv = min(mv, tegra_cpu_speedo_mv()); /* * Find matching cpu dvfs entry, and use it to determine index to the @@ -479,7 +470,8 @@ static int __init get_cpu_nominal_mv_index( static int __init get_core_nominal_mv_index(int speedo_id) { - int i, mv; + int i; + int mv = tegra_core_speedo_mv(); int core_edp_limit = get_core_edp(); /* @@ -487,9 +479,6 @@ static int __init get_core_nominal_mv_index(int speedo_id) * make sure core nominal voltage is below edp limit for the board * (if edp limit is set). */ - BUG_ON(speedo_id >= ARRAY_SIZE(core_speedo_nominal_millivolts)); - mv = core_speedo_nominal_millivolts[speedo_id]; - if (core_edp_limit) mv = min(mv, core_edp_limit); |