diff options
| author | Luke Huang <lhuang@nvidia.com> | 2011-02-25 17:33:07 -0800 |
|---|---|---|
| committer | Dan Willemsen <dwillemsen@nvidia.com> | 2011-04-26 15:52:20 -0700 |
| commit | 14c60944fbb8f45c335f45e04a3ba2e62f5af08f (patch) | |
| tree | 4c7c168fb8f37f6b62523ee4f0656a34f8ea6bb7 /arch/arm/mach-tegra/tegra3_save.S | |
| parent | a537d31ca1911dcd4005723f6755c906087d9de7 (diff) | |
arm: tegra: fix system hang on lp0 suspend
Switch the clock source for mselect to be CLK_M before shutting down PllP.
Original-Change-Id: I9425b9b47c0788420ddd116cfc77d416ce418118
Reviewed-on: http://git-master/r/21008
Tested-by: Chih-Lung Huang <lhuang@nvidia.com>
Reviewed-by: Aleksandr Frid <afrid@nvidia.com>
Reviewed-by: Yu-Huan Hsu <yhsu@nvidia.com>
Change-Id: I339c5e1ced5bb2e1986c7baaa818d18cbea65226
Diffstat (limited to 'arch/arm/mach-tegra/tegra3_save.S')
| -rw-r--r-- | arch/arm/mach-tegra/tegra3_save.S | 7 |
1 files changed, 7 insertions, 0 deletions
diff --git a/arch/arm/mach-tegra/tegra3_save.S b/arch/arm/mach-tegra/tegra3_save.S index bf72b85a5a71..9a35aac9c6ad 100644 --- a/arch/arm/mach-tegra/tegra3_save.S +++ b/arch/arm/mach-tegra/tegra3_save.S @@ -71,6 +71,8 @@ #define CLK_RESET_PLLP_MISC 0xac #define CLK_RESET_PLLX_MISC 0xe4 +#define CLK_RESET_CLK_SOURCE_MSELECT 0x3b4 +#define MSELECT_CLKM (0x3 << 30) #include "power-macros.S" @@ -358,6 +360,11 @@ __tear_down_master_pll_cpu: str r0, [r5, #CLK_RESET_CCLK_DIVIDER] str r0, [r5, #CLK_RESET_SCLK_DIVIDER] + /* switch the clock source for mselect to be CLK_M */ + ldr r0, [r5, #CLK_RESET_CLK_SOURCE_MSELECT] + orr r0, r0, #MSELECT_CLKM + str r0, [r5, #CLK_RESET_CLK_SOURCE_MSELECT] + /* 2 us delay between changing sclk and disabling PLLs */ wait_for_us r1, r7, r9 add r1, r1, #2 |