diff options
| author | Alex Frid <afrid@nvidia.com> | 2012-10-09 00:44:14 -0700 |
|---|---|---|
| committer | Dan Willemsen <dwillemsen@nvidia.com> | 2013-09-14 12:37:17 -0700 |
| commit | eeb0d7eec034179775db211d928e92d499a62fcd (patch) | |
| tree | e5a8235ee4b9329842616acfbb57195034215d37 /arch/arm/mach-tegra/tegra_cl_dvfs.h | |
| parent | 61785bb19386669e3accaf35df963268fbf91812 (diff) | |
ARM: tegra11: dvfs: Dynamically allocate cl dvfs object
Dynamically allocated cl dvfs object by the cl-dvfs driver, and
hide cl_dvfs structure definition from clock framework.
Signed-off-by: Alex Frid <afrid@nvidia.com>
Reviewed-on: http://git-master/r/142851
(cherry picked from commit a2adb1710edc52c61b1fa336e5253aa5735ec717)
Change-Id: I6dd1af043d15aba143bdf02bb53dd1e796784626
Signed-off-by: Bharat Nihalani <bnihalani@nvidia.com>
Reviewed-on: http://git-master/r/146277
Reviewed-by: Automatic_Commit_Validation_User
Rebase-Id: R426561875c23c8e17600be892ee843f5ca16ebd1
Diffstat (limited to 'arch/arm/mach-tegra/tegra_cl_dvfs.h')
| -rw-r--r-- | arch/arm/mach-tegra/tegra_cl_dvfs.h | 40 |
1 files changed, 1 insertions, 39 deletions
diff --git a/arch/arm/mach-tegra/tegra_cl_dvfs.h b/arch/arm/mach-tegra/tegra_cl_dvfs.h index 36e8b31cfb52..b0d39bd634d6 100644 --- a/arch/arm/mach-tegra/tegra_cl_dvfs.h +++ b/arch/arm/mach-tegra/tegra_cl_dvfs.h @@ -19,17 +19,10 @@ #ifndef _TEGRA_CL_DVFS_H_ #define _TEGRA_CL_DVFS_H_ -#include "dvfs.h" +struct tegra_cl_dvfs; #define MAX_CL_DVFS_VOLTAGES 33 -enum tegra_cl_dvfs_ctrl_mode { - TEGRA_CL_DVFS_UNINITIALIZED = 0, - TEGRA_CL_DVFS_DISABLED = 1, - TEGRA_CL_DVFS_OPEN_LOOP = 2, - TEGRA_CL_DVFS_CLOSED_LOOP = 3, -}; - enum tegra_cl_dvfs_force_mode { TEGRA_CL_DVFS_FORCE_NONE = 0, TEGRA_CL_DVFS_FORCE_FIXED = 1, @@ -84,37 +77,6 @@ struct tegra_cl_dvfs_platform_data { struct tegra_cl_dvfs_cfg_param *cfg_param; }; -struct dfll_rate_req { - u8 freq; - u8 scale; - u8 output; -}; - -struct tegra_cl_dvfs { - u32 cl_base; - struct tegra_cl_dvfs_platform_data *p_data; - - struct dvfs *safe_dvfs; - struct clk *soc_clk; - struct clk *ref_clk; - struct clk *i2c_clk; - unsigned long ref_rate; - unsigned long i2c_rate; - - /* output voltage mapping: - * legacy dvfs table index -to- cl_dvfs output LUT index - * cl_dvfs output LUT index -to- PMU value/voltage pair ptr - */ - u8 clk_dvfs_map[MAX_DVFS_FREQS]; - struct voltage_reg_map *out_map[MAX_CL_DVFS_VOLTAGES]; - u8 num_voltages; - u8 safe_ouput; - - struct dfll_rate_req last_req; - unsigned long dfll_rate_min; - enum tegra_cl_dvfs_ctrl_mode mode; -}; - #ifdef CONFIG_ARCH_TEGRA_HAS_CL_DVFS int tegra_init_cl_dvfs(void); void tegra_cl_dvfs_resume(struct tegra_cl_dvfs *cld); |