diff options
| author | Varun Wadekar <vwadekar@nvidia.com> | 2012-04-10 17:50:40 +0530 |
|---|---|---|
| committer | Varun Wadekar <vwadekar@nvidia.com> | 2012-04-10 17:50:40 +0530 |
| commit | 5bc74cdbb9e01f0279bdf94ebe9ea5a6fd4b9fcf (patch) | |
| tree | bda13d1630b8ddb76c52f4f48dc29bc6e8915865 /arch/arm/mach-tegra/timer.h | |
| parent | 8ae48e1625406344b443af74526e0aa7b24eab4b (diff) | |
ARM: tegra: timer: fix timer init sequence
rip out common things from tegra2/3 code and include them
in the common timer init sequence.
Change-Id: Ia6f3dc26b6ddbbc89640a6831b011d69d233338e
Signed-off-by: Varun Wadekar <vwadekar@nvidia.com>
Diffstat (limited to 'arch/arm/mach-tegra/timer.h')
| -rw-r--r-- | arch/arm/mach-tegra/timer.h | 16 |
1 files changed, 11 insertions, 5 deletions
diff --git a/arch/arm/mach-tegra/timer.h b/arch/arm/mach-tegra/timer.h index 69c11dbc6ef2..250a99afb557 100644 --- a/arch/arm/mach-tegra/timer.h +++ b/arch/arm/mach-tegra/timer.h @@ -21,18 +21,24 @@ #define RTC_SHADOW_SECONDS 0x0c #define RTC_MILLISECONDS 0x10 -#define TIMER_PTV 0x0 -#define TIMER_PCR 0x4 - #define TIMERUS_CNTR_1US 0x10 #define TIMERUS_USEC_CFG 0x14 #define TIMERUS_CNTR_FREEZE 0x4c +#define TIMER1_BASE 0x0 +#define TIMER2_BASE 0x8 +#define TIMER3_BASE 0x50 +#define TIMER4_BASE 0x58 + +#define TIMER_PTV 0x0 +#define TIMER_PCR 0x4 + +void __init tegra_init_timer(void); #ifdef CONFIG_ARCH_TEGRA_2x_SOC -void __init tegra2_init_timer(u32 *offset, int *irq, unsigned long rate); +void __init tegra20_init_timer(void); #else -void __init tegra3_init_timer(u32 *offset, int *irq, unsigned long rate); +void __init tegra30_init_timer(void); #endif struct tegra_twd_context { |