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authorCatalin Marinas <catalin.marinas@arm.com>2011-04-06 16:18:47 +0100
committerRussell King <rmk+kernel@arm.linux.org.uk>2011-05-12 10:52:00 +0100
commita904f5f9eb7a55baacb2f4c1423cac8a8eb78a3a (patch)
treed3ada07264a900601f8e610f9270b5319a6631d4 /arch/arm/mach-tegra
parent2af68df02fe5ccd644f4312ba2401996f52faab3 (diff)
ARM: 6870/1: The mandatory barrier rmb() must be a dsb() in for device accesses
Since mandatory barriers may be used (explicitly or implicitly via readl etc.) to ensure the ordering between Device and Normal memory accesses, a DMB is not enough. This patch converts it to a DSB. Cc: Colin Cross <ccross@android.com> Signed-off-by: Catalin Marinas <catalin.marinas@arm.com> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
Diffstat (limited to 'arch/arm/mach-tegra')
-rw-r--r--arch/arm/mach-tegra/include/mach/barriers.h2
1 files changed, 1 insertions, 1 deletions
diff --git a/arch/arm/mach-tegra/include/mach/barriers.h b/arch/arm/mach-tegra/include/mach/barriers.h
index cc115174899b..425b42e91ef6 100644
--- a/arch/arm/mach-tegra/include/mach/barriers.h
+++ b/arch/arm/mach-tegra/include/mach/barriers.h
@@ -23,7 +23,7 @@
#include <asm/outercache.h>
-#define rmb() dmb()
+#define rmb() dsb()
#define wmb() do { dsb(); outer_sync(); } while (0)
#define mb() wmb()