diff options
| author | Diwakar Tundlam <dtundlam@nvidia.com> | 2011-08-11 17:22:57 -0700 |
|---|---|---|
| committer | Dan Willemsen <dwillemsen@nvidia.com> | 2011-11-30 21:50:03 -0800 |
| commit | 19b0f6f2a488909399f7215716061bb8d21c6375 (patch) | |
| tree | d624983f17c223747a5d62df8f5686d6685553af /arch/arm/mach-tegra | |
| parent | a708adc56efefe4c158c0c42fb73b1005655a387 (diff) | |
ARM: Tegra: dvfs: T33 SKU EDP table
Bug 841336
Reviewed-on: http://git-master/r/60779
(cherry picked from commit 4d3f017e2715f50aaca6c7e8dc61e880947f7550)
Change-Id: Ib1eeb8729a91162d39fc952eeb7494d8863a03c7
Reviewed-on: http://git-master/r/64204
Reviewed-by: Diwakar Tundlam <dtundlam@nvidia.com>
Tested-by: Diwakar Tundlam <dtundlam@nvidia.com>
Rebase-Id: Rcfa5f6c11e831c4f08e956609ea8f9d98a6111f8
Diffstat (limited to 'arch/arm/mach-tegra')
| -rw-r--r-- | arch/arm/mach-tegra/edp.c | 7 | ||||
| -rw-r--r-- | arch/arm/mach-tegra/tegra3_speedo.c | 18 |
2 files changed, 16 insertions, 9 deletions
diff --git a/arch/arm/mach-tegra/edp.c b/arch/arm/mach-tegra/edp.c index 65323c3a249b..9c3cb0a87f34 100644 --- a/arch/arm/mach-tegra/edp.c +++ b/arch/arm/mach-tegra/edp.c @@ -101,6 +101,9 @@ static char __initdata tegra_edp_map[] = { 0x82, 0x82, 0x6e, 0x03, 0x23, 0x3c, 0x8c, 0x82, 0x78, 0x6e, 0x03, 0x23, 0x4b, 0x8c, 0x82, 0x78, 0x5f, 0x03, 0x23, 0x55, 0x8c, 0x82, 0x6e, 0x5a, + 0x05, 0x3c, 0x46, 0xaa, 0xa0, 0x82, 0x82, 0x05, + 0x3c, 0x4b, 0x91, 0x91, 0x82, 0x82, 0x05, 0x3c, + 0x55, 0x8c, 0x82, 0x82, 0x82, }; @@ -126,6 +129,10 @@ void __init tegra_init_cpu_edp_limits(unsigned int regulator_mA) struct tegra_edp_entry *t = (struct tegra_edp_entry *)tegra_edp_map; int tsize = sizeof(tegra_edp_map)/sizeof(struct tegra_edp_entry); + /* FIXME: Now for T33 we use 6A limit - fix this later */ + if (cpu_speedo_id > 3) + regulator_mA = 6000; + if (!regulator_mA) { edp_limits = edp_default_limits; edp_limits_size = ARRAY_SIZE(edp_default_limits); diff --git a/arch/arm/mach-tegra/tegra3_speedo.c b/arch/arm/mach-tegra/tegra3_speedo.c index f1b8b285838f..4eed24ed27e2 100644 --- a/arch/arm/mach-tegra/tegra3_speedo.c +++ b/arch/arm/mach-tegra/tegra3_speedo.c @@ -48,8 +48,8 @@ static const u32 core_process_speedos[][CORE_PROCESS_CORNERS_NUM] = { /* T33 family: Numbers cloned from T30 family; FIXME: adjust these later */ {180}, /* threshold_index 7: soc_speedo_id = 1 - AP33 */ - {196}, /* threshold_index 8: soc_speedo_id = 2 - T33 */ - {196}, /* threshold_index 9: soc_speedo_id = 2 - T33S */ + {204}, /* threshold_index 8: soc_speedo_id = 2 - T33 */ + {192}, /* threshold_index 9: soc_speedo_id = 2 - T33S */ }; /* Maximum speedo levels for each CPU process corner */ @@ -67,10 +67,10 @@ static const u32 cpu_process_speedos[][CPU_PROCESS_CORNERS_NUM] = { {324, 324, 348, 364}, /* threshold_index 5: cpu_speedo_id 2: T30char */ {324, 324, 348, 364}, /* threshold_index 6: cpu_speedo_id 3: T30Schar */ -/* T33 family: Numbers cloned from T30 family; FIXME: adjust these later */ - {376, 376, 376, 376}, /* threshold_FIXME 7: cpu_speedo_id = 1 - AP33 */ - {368, 368, 368, 368}, /* threshold_index 8: cpu_speedo_id = 2 - T33 */ - {372, 372, 372, 372}, /* threshold_index 9: cpu_speedo_id = 3 - T33S */ +/* T33 family */ + {376, 376, 376, 376}, /* threshold_FIXME 7: cpu_speedo_id = 4 - AP33 */ + {368, 368, 368, 368}, /* threshold_index 8: cpu_speedo_id = 5 - T33 */ + {372, 372, 372, 372}, /* threshold_index 9: cpu_speedo_id = 6 - T33S */ }; /* @@ -126,7 +126,7 @@ static void rev_sku_to_speedo_ids(int rev, int sku) threshold_index = 2; break; case 2: /* DSC => AP33 */ - cpu_speedo_id = 1; + cpu_speedo_id = 4; soc_speedo_id = 1; threshold_index = 7; break; @@ -141,12 +141,12 @@ static void rev_sku_to_speedo_ids(int rev, int sku) case 0x80: /* T33 or T33S */ switch (package_id) { case 1: /* MID => T33 */ - cpu_speedo_id = 2; + cpu_speedo_id = 5; soc_speedo_id = 2; threshold_index = 8; break; case 2: /* DSC => T33S */ - cpu_speedo_id = 3; + cpu_speedo_id = 6; soc_speedo_id = 2; threshold_index = 9; break; |