diff options
| author | Seshendra Gadagottu <sgadagottu@nvidia.com> | 2011-08-25 17:59:20 +0530 |
|---|---|---|
| committer | Dan Willemsen <dwillemsen@nvidia.com> | 2011-11-30 21:48:36 -0800 |
| commit | 937fe80954484d276bd55db8745718985ac8f2c3 (patch) | |
| tree | 39eb6eb9bbaf5017c4cd3bdba2ded7f631fc075c /arch/arm/mach-tegra | |
| parent | c2fa64f3f805ed2173f2e8f8772840336e4f90a4 (diff) | |
usb: ehci: tegra: Fix resume issue for T30 HSIC
After resume, HOSPC register needs to be configured
correctly for HSIC to be function. Also no need to set
UHSIC_RPU_STROBE line during hsic bus idle sequence.
BUG 868313
Original-Change-Id: I79debb424021f375e9a93df731848cfbc95068bc
Reviewed-on: http://git-master/r/49195
Reviewed-by: Varun Colbert <vcolbert@nvidia.com>
Tested-by: Varun Colbert <vcolbert@nvidia.com>
Rebase-Id: R4a5e18227c213c722246aa6703d7667c7e4ae659
Diffstat (limited to 'arch/arm/mach-tegra')
| -rw-r--r-- | arch/arm/mach-tegra/usb_phy.c | 11 |
1 files changed, 11 insertions, 0 deletions
diff --git a/arch/arm/mach-tegra/usb_phy.c b/arch/arm/mach-tegra/usb_phy.c index c40de4d4d5d7..9b7907f3fe38 100644 --- a/arch/arm/mach-tegra/usb_phy.c +++ b/arch/arm/mach-tegra/usb_phy.c @@ -2366,6 +2366,15 @@ int tegra_usb_phy_bus_idle(struct tegra_usb_phy *phy) void __iomem *base = phy->regs; if (phy->usb_phy_type == TEGRA_USB_PHY_TYPE_HSIC) { +#ifndef CONFIG_ARCH_TEGRA_2x_SOC + /* Change the USB controller PHY type to HSIC */ + val = readl(base + HOSTPC1_DEVLC); + val &= ~HOSTPC1_DEVLC_PTS(HOSTPC1_DEVLC_PTS_MASK); + val |= HOSTPC1_DEVLC_PTS(HOSTPC1_DEVLC_PTS_HSIC); + val &= ~HOSTPC1_DEVLC_PSPD(HOSTPC1_DEVLC_PSPD_MASK); + val |= HOSTPC1_DEVLC_PSPD(HOSTPC1_DEVLC_PSPD_HIGH_SPEED); + writel(val, base + HOSTPC1_DEVLC); +#endif val = readl(base + UHSIC_MISC_CFG0); val |= UHSIC_DETECT_SHORT_CONNECT; writel(val, base + UHSIC_MISC_CFG0); @@ -2377,7 +2386,9 @@ int tegra_usb_phy_bus_idle(struct tegra_usb_phy *phy) val = readl(base + UHSIC_PADS_CFG1); val &= ~UHSIC_RPD_STROBE; +#ifdef CONFIG_ARCH_TEGRA_2x_SOC val |= UHSIC_RPU_STROBE; +#endif writel(val, base + UHSIC_PADS_CFG1); } return 0; |